690 lines
87 KiB
HTML
Executable File
690 lines
87 KiB
HTML
Executable File
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<a name="l1"></a><span class=cF1>U0</span><span class=cF0> </span><span class=cFD>ICAddEct</span><span class=cF0>(</span><span class=cF9>CIntermediateCode</span><span class=cF0> *tmpi,</span><span class=cF9>CICType</span><span class=cF0> t1,</span><span class=cF9>I64</span><span class=cF0> r1,</span><span class=cF9>I64</span><span class=cF0> d1,
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<a name="l2"></a> </span><span class=cF9>CICType</span><span class=cF0> t2,</span><span class=cF9>I64</span><span class=cF0> r2,</span><span class=cF9>I64</span><span class=cF0> d2,</span><span class=cF9>CICType</span><span class=cF0> t3,</span><span class=cF9>I64</span><span class=cF0> r3,</span><span class=cF9>I64</span><span class=cF0> d3,</span><span class=cF9>I64</span><span class=cF0> op,</span><span class=cF9>I64</span><span class=cF0> rip)
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<a name="l3"></a>{
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<a name="l4"></a> </span><span class=cF9>I64</span><span class=cF0> i,tmp,res_reg=</span><span class=cF3>REG_RAX</span><span class=cF0>;
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<a name="l5"></a> </span><span class=cF1>Bool</span><span class=cF0> swap=</span><span class=cF3>FALSE</span><span class=cF0>;
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<a name="l6"></a> </span><span class=cF1>if</span><span class=cF0> (r3!=res_reg) </span><span class=cF7>{</span><span class=cF0>
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<a name="l7"></a> swap^=</span><span class=cF3>TRUE</span><span class=cF0>;
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<a name="l8"></a> </span><span class=cF5>SwapI64</span><span class=cF0>(&t2,&t3);
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<a name="l9"></a> </span><span class=cF5>SwapI64</span><span class=cF0>(&r2,&r3);
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<a name="l10"></a> </span><span class=cF5>SwapI64</span><span class=cF0>(&d2,&d3);
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<a name="l11"></a> </span><span class=cF7>}</span><span class=cF0>
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<a name="l12"></a> </span><span class=cF1>if</span><span class=cF0> (t2.raw_type>=</span><span class=cF3>RT_I64</span><span class=cF0> && r2!=res_reg && t2&</span><span class=cF3>MDG_REG_DISP_SIB_RIP</span><span class=cF0>) </span><span class=cF7>{</span><span class=cF0>
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<a name="l13"></a> </span><span class=cF1>if</span><span class=cF0> (t1&</span><span class=cF3>MDF_REG</span><span class=cF0> && !</span><span class=cF7>(</span><span class=cF0>r2==r1 && t2&</span><span class=cF3>MDG_REG_DISP_SIB</span><span class=cF7>)</span><span class=cF0>)
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<a name="l14"></a> res_reg=r1;
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<a name="l15"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi,</span><span class=cF3>MDF_REG</span><span class=cF0>+</span><span class=cF3>RT_I64</span><span class=cF0>,res_reg,0,t3,r3,d3,rip);
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<a name="l16"></a> i=</span><span class=cFD>ICModr1</span><span class=cF0>(res_reg,t2,r2,d2);
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<a name="l17"></a> </span><span class=cF1>if</span><span class=cF0> (tmpi->ic_flags&</span><span class=cF3>ICF_LOCK</span><span class=cF0>)
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<a name="l18"></a> </span><span class=cFD>ICU8</span><span class=cF0>(tmpi,</span><span class=cF3>OC_LOCK_PREFIX</span><span class=cF0>);
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<a name="l19"></a> </span><span class=cFD>ICRex</span><span class=cF0>(tmpi,i.u8[1]);
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<a name="l20"></a> </span><span class=cFD>ICU16</span><span class=cF0>(tmpi,i.u8[2]<<8+op);
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<a name="l21"></a> </span><span class=cFD>ICModr2</span><span class=cF0>(tmpi,i,,d2,rip);
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<a name="l22"></a> </span><span class=cF7>}</span><span class=cF0> </span><span class=cF1>else</span><span class=cF0> </span><span class=cF7>{</span><span class=cF0>
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<a name="l23"></a> </span><span class=cF1>if</span><span class=cF0> (t2&</span><span class=cF3>MDF_REG</span><span class=cF0>)
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<a name="l24"></a> tmp=r2;
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<a name="l25"></a> </span><span class=cF1>else</span><span class=cF0>
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<a name="l26"></a> tmp=</span><span class=cF3>REG_RCX</span><span class=cF0>;
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<a name="l27"></a>
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<a name="l28"></a> </span><span class=cF1>if</span><span class=cF0> (t1&</span><span class=cF3>MDF_REG</span><span class=cF0>)
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<a name="l29"></a> res_reg=r1;
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<a name="l30"></a>
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<a name="l31"></a> </span><span class=cF1>if</span><span class=cF0> (tmp==res_reg)
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<a name="l32"></a> res_reg=</span><span class=cF3>REG_RDX</span><span class=cF0>;
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<a name="l33"></a> </span><span class=cF1>if</span><span class=cF0> (swap) {
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<a name="l34"></a> </span><span class=cF1>if</span><span class=cF0> (r3==tmp && t3&</span><span class=cF3>MDG_REG_DISP_SIB</span><span class=cF0>)
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<a name="l35"></a> tmp=</span><span class=cF3>REG_RCX</span><span class=cF0>;
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<a name="l36"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi,</span><span class=cF3>MDF_REG</span><span class=cF0>+</span><span class=cF3>RT_I64</span><span class=cF0>,tmp,0,t2,r2,d2,rip);
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<a name="l37"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi,</span><span class=cF3>MDF_REG</span><span class=cF0>+</span><span class=cF3>RT_I64</span><span class=cF0>,res_reg,0,t3,r3,d3,rip);
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<a name="l38"></a> } </span><span class=cF1>else</span><span class=cF0> {
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<a name="l39"></a> </span><span class=cF1>if</span><span class=cF0> (r2==res_reg && t2&</span><span class=cF3>MDG_REG_DISP_SIB</span><span class=cF0>)
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<a name="l40"></a> res_reg=</span><span class=cF3>REG_RDX</span><span class=cF0>;
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<a name="l41"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi,</span><span class=cF3>MDF_REG</span><span class=cF0>+</span><span class=cF3>RT_I64</span><span class=cF0>,res_reg,0,t3,r3,d3,rip);
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<a name="l42"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi,</span><span class=cF3>MDF_REG</span><span class=cF0>+</span><span class=cF3>RT_I64</span><span class=cF0>,tmp,0,t2,r2,d2,rip);
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<a name="l43"></a> }
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<a name="l44"></a> i=0x48;
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<a name="l45"></a> </span><span class=cF1>if</span><span class=cF0> (res_reg>7)
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<a name="l46"></a> i+=4;
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<a name="l47"></a> </span><span class=cF1>if</span><span class=cF0> (tmp>7)
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<a name="l48"></a> i++;
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<a name="l49"></a> </span><span class=cF1>if</span><span class=cF0> (tmpi->ic_flags&</span><span class=cF3>ICF_LOCK</span><span class=cF0>)
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<a name="l50"></a> </span><span class=cFD>ICU8</span><span class=cF0>(tmpi,</span><span class=cF3>OC_LOCK_PREFIX</span><span class=cF0>);
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<a name="l51"></a> </span><span class=cFD>ICU24</span><span class=cF0>(tmpi,0xC00000+i+</span><span class=cF7>(</span><span class=cF0>tmp&7</span><span class=cF7>)</span><span class=cF0><<16+</span><span class=cF7>(</span><span class=cF0>res_reg&7</span><span class=cF7>)</span><span class=cF0><<19+op<<8);
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<a name="l52"></a> </span><span class=cF7>}</span><span class=cF0>
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<a name="l53"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi,t1,r1,d1,</span><span class=cF3>MDF_REG</span><span class=cF0>+</span><span class=cF3>RT_I64</span><span class=cF0>,res_reg,0,rip);
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<a name="l54"></a>}
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<a name="l55"></a>
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<a name="l56"></a></span><span class=cF1>U0</span><span class=cF0> </span><span class=cFD>ICAddSubEctImm</span><span class=cF0>(</span><span class=cF9>CIntermediateCode</span><span class=cF0> *tmpi,</span><span class=cF9>CICType</span><span class=cF0> t1,</span><span class=cF9>I64</span><span class=cF0> r1,</span><span class=cF9>I64</span><span class=cF0> d1,
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<a name="l57"></a> </span><span class=cF9>CICType</span><span class=cF0> t2,</span><span class=cF9>I64</span><span class=cF0> r2,</span><span class=cF9>I64</span><span class=cF0> d2,</span><span class=cF9>I64</span><span class=cF0> d,</span><span class=cF9>I64</span><span class=cF0> op,</span><span class=cF9>I64</span><span class=cF0> rip)
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<a name="l58"></a>{
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<a name="l59"></a> </span><span class=cF9>I64</span><span class=cF0> i;
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<a name="l60"></a> </span><span class=cF1>if</span><span class=cF0> (op.u8[0]==0x2B) </span><span class=cF7>{</span><span class=cF0>
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<a name="l61"></a> op=0x0003;
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<a name="l62"></a> d=-d;
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<a name="l63"></a> </span><span class=cF7>}</span><span class=cF0>
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<a name="l64"></a> </span><span class=cF1>if</span><span class=cF0> (t1&</span><span class=cF3>MDF_REG</span><span class=cF0>) </span><span class=cF7>{</span><span class=cF0>
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<a name="l65"></a> </span><span class=cF1>if</span><span class=cF0> (!</span><span class=cF7>(</span><span class=cF0>t2&</span><span class=cF3>MDF_REG</span><span class=cF7>)</span><span class=cF0>) {
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<a name="l66"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi,t1,r1,d1,t2,r2,d2,rip);
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<a name="l67"></a> t2=t1;
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<a name="l68"></a> r2=r1;
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<a name="l69"></a> d2=d1;
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<a name="l70"></a> }
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<a name="l71"></a> </span><span class=cF1>if</span><span class=cF0> (r1==r2) {
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<a name="l72"></a> </span><span class=cF1>if</span><span class=cF0> (r1>7)
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<a name="l73"></a> i=0x49;
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<a name="l74"></a> </span><span class=cF1>else</span><span class=cF0>
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<a name="l75"></a> i=0x48;
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<a name="l76"></a> </span><span class=cF1>if</span><span class=cF0> (!d &&
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<a name="l77"></a> </span><span class=cF7>(</span><span class=cF0>op.u8[0]==0x03||op.u8[0]==0x2B||op.u8[0]==0x33||op.u8[0]==0x0B</span><span class=cF7>)</span><span class=cF0>)
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<a name="l78"></a> </span><span class=cF1>return</span><span class=cF0>;
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<a name="l79"></a> </span><span class=cF1>else</span><span class=cF0> </span><span class=cF1>if</span><span class=cF0> (d==1 && op.u8[0]==0x03) </span><span class=cF7>{</span><span class=cF0>
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<a name="l80"></a> </span><span class=cFD>ICU24</span><span class=cF0>(tmpi,0xC0FF00+op.u8[1]<<19+i+</span><span class=cF7>(</span><span class=cF0>r1&7</span><span class=cF7>)</span><span class=cF0><<16);
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<a name="l81"></a> </span><span class=cF1>return</span><span class=cF0>;
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<a name="l82"></a> </span><span class=cF7>}</span><span class=cF0> </span><span class=cF1>else</span><span class=cF0> </span><span class=cF1>if</span><span class=cF0> (d==-1 && op.u8[0]==0x03) </span><span class=cF7>{</span><span class=cF0>
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<a name="l83"></a> </span><span class=cFD>ICU24</span><span class=cF0>(tmpi,0xC8FF00+i+</span><span class=cF7>(</span><span class=cF0>r1&7</span><span class=cF7>)</span><span class=cF0><<16);
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<a name="l84"></a> </span><span class=cF1>return</span><span class=cF0>;
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<a name="l85"></a> </span><span class=cF7>}</span><span class=cF0> </span><span class=cF1>else</span><span class=cF0> </span><span class=cF1>if</span><span class=cF0> (</span><span class=cF3>I8_MIN</span><span class=cF0><=d<=</span><span class=cF3>I8_MAX</span><span class=cF0>) </span><span class=cF7>{</span><span class=cF0>
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<a name="l86"></a> </span><span class=cFD>ICU24</span><span class=cF0>(tmpi,0xC08300+op.u8[1]<<19+i+</span><span class=cF7>(</span><span class=cF0>r1&7</span><span class=cF7>)</span><span class=cF0><<16);
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<a name="l87"></a> </span><span class=cFD>ICU8</span><span class=cF0>(tmpi,d);
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<a name="l88"></a> </span><span class=cF1>return</span><span class=cF0>;
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<a name="l89"></a> </span><span class=cF7>}</span><span class=cF0> </span><span class=cF1>else</span><span class=cF0> </span><span class=cF1>if</span><span class=cF0> (</span><span class=cF3>I32_MIN</span><span class=cF0><=d<=</span><span class=cF3>I32_MAX</span><span class=cF0>) </span><span class=cF7>{</span><span class=cF0>
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<a name="l90"></a> </span><span class=cFD>ICU24</span><span class=cF0>(tmpi,0xC08100+op.u8[1]<<19+i+</span><span class=cF7>(</span><span class=cF0>r1&7</span><span class=cF7>)</span><span class=cF0><<16);
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<a name="l91"></a> </span><span class=cFD>ICU32</span><span class=cF0>(tmpi,d);
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<a name="l92"></a> </span><span class=cF1>return</span><span class=cF0>;
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<a name="l93"></a> </span><span class=cF7>}</span><span class=cF0>
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<a name="l94"></a> }
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<a name="l95"></a> </span><span class=cF1>if</span><span class=cF0> (op.u8[0]==0x03 && </span><span class=cF3>I32_MIN</span><span class=cF0><=d<=</span><span class=cF3>I32_MAX</span><span class=cF0> &&
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<a name="l96"></a> !</span><span class=cF5>Bt</span><span class=cF7>(</span><span class=cF0>&</span><span class=cFB>cmp</span><span class=cF0>.non_ptr_vars_mask,r2</span><span class=cF7>)</span><span class=cF0>) {
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<a name="l97"></a> i=</span><span class=cFD>ICModr1</span><span class=cF0>(r1,</span><span class=cF3>MDF_DISP</span><span class=cF0>+</span><span class=cF3>RT_I64</span><span class=cF0>,r2,d);
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<a name="l98"></a> i.u8[1]|=0x48;
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<a name="l99"></a> </span><span class=cFD>ICU24</span><span class=cF0>(tmpi,i.u8[2]<<16+0x8D00+i.u8[1]);
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<a name="l100"></a> </span><span class=cFD>ICModr2</span><span class=cF0>(tmpi,i,,d,rip);
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<a name="l101"></a> </span><span class=cF1>return</span><span class=cF0>;
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<a name="l102"></a> }
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<a name="l103"></a> </span><span class=cF7>}</span><span class=cF0>
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<a name="l104"></a> </span><span class=cF1>switch</span><span class=cF0> (</span><span class=cF5>Bsr</span><span class=cF7>(</span><span class=cF0>t1</span><span class=cF7>)</span><span class=cF0>) </span><span class=cF7>{</span><span class=cF0>
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<a name="l105"></a> </span><span class=cF1>case</span><span class=cF0> </span><span class=cF3>MDf_REG</span><span class=cF0>:
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<a name="l106"></a> </span><span class=cF1>case</span><span class=cF0> </span><span class=cF3>MDf_DISP</span><span class=cF0>:
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<a name="l107"></a> </span><span class=cF1>case</span><span class=cF0> </span><span class=cF3>MDf_SIB</span><span class=cF0>:
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<a name="l108"></a> </span><span class=cF1>case</span><span class=cF0> </span><span class=cF3>MDf_RIP_DISP32</span><span class=cF0>:
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<a name="l109"></a> </span><span class=cF1>if</span><span class=cF0> (t1!=t2 || r1!=r2 || d1!=d2) {
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<a name="l110"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi,t1,r1,d1,t2,r2,d2,rip);
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<a name="l111"></a> t2=t1;
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<a name="l112"></a> r2=r1;
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<a name="l113"></a> d2=d1;
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<a name="l114"></a> }
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<a name="l115"></a>
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<a name="l116"></a> </span><span class=cF1>if</span><span class=cF0> (!d &&</span><span class=cF7>(</span><span class=cF0>op.u8[0]==0x03||op.u8[0]==0x2B||op.u8[0]==0x33||op.u8[0]==0x0B</span><span class=cF7>)</span><span class=cF0>)
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<a name="l117"></a> </span><span class=cF1>return</span><span class=cF0>;
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<a name="l118"></a>
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<a name="l119"></a> </span><span class=cF1>if</span><span class=cF0> (op.u8[0]==0x03 && d==-1) </span><span class=cF2>//add -1</span><span class=cF0>
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<a name="l120"></a> op.u8[1]=1; </span><span class=cF2>//Decrement slash val</span><span class=cF0>
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<a name="l121"></a>
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<a name="l122"></a> </span><span class=cF1>if</span><span class=cF0> (op.u8[0]==0x03 && </span><span class=cF7>(</span><span class=cF0>d==1 || d==-1</span><span class=cF7>)</span><span class=cF0>) { </span><span class=cF2>//Add</span><span class=cF0>
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<a name="l123"></a> i=</span><span class=cFD>ICModr1</span><span class=cF0>(op.u8[1],t1,r1,d1);
|
|
<a name="l124"></a> </span><span class=cF1>if</span><span class=cF0> (!</span><span class=cF7>(</span><span class=cF0>t1&</span><span class=cF3>MDF_REG</span><span class=cF7>)</span><span class=cF0> && tmpi->ic_flags&</span><span class=cF3>ICF_LOCK</span><span class=cF0>)
|
|
<a name="l125"></a> </span><span class=cFD>ICU8</span><span class=cF0>(tmpi,</span><span class=cF3>OC_LOCK_PREFIX</span><span class=cF0>);
|
|
<a name="l126"></a> </span><span class=cF1>switch</span><span class=cF0> (t1.raw_type) </span><span class=cF7>{</span><span class=cF0>
|
|
<a name="l127"></a> </span><span class=cF1>case</span><span class=cF0> </span><span class=cF3>RT_I8</span><span class=cF0>:
|
|
<a name="l128"></a> </span><span class=cF1>case</span><span class=cF0> </span><span class=cF3>RT_U8</span><span class=cF0>:
|
|
<a name="l129"></a> </span><span class=cFD>ICRex</span><span class=cF0>(tmpi,i.u8[1]);
|
|
<a name="l130"></a> </span><span class=cFD>ICU16</span><span class=cF0>(tmpi,i.u8[2]<<8+0xFE);
|
|
<a name="l131"></a> </span><span class=cF1>break</span><span class=cF0>;
|
|
<a name="l132"></a> </span><span class=cF1>case</span><span class=cF0> </span><span class=cF3>RT_I16</span><span class=cF0>:
|
|
<a name="l133"></a> </span><span class=cF1>case</span><span class=cF0> </span><span class=cF3>RT_U16</span><span class=cF0>:
|
|
<a name="l134"></a> </span><span class=cFD>ICOpSizeRex</span><span class=cF0>(tmpi,i.u8[1]);
|
|
<a name="l135"></a> </span><span class=cFD>ICU16</span><span class=cF0>(tmpi,i.u8[2]<<8+0xFF);
|
|
<a name="l136"></a> </span><span class=cF1>break</span><span class=cF0>;
|
|
<a name="l137"></a> </span><span class=cF1>default</span><span class=cF0>:
|
|
<a name="l138"></a> </span><span class=cFD>ICRex</span><span class=cF0>(tmpi,i.u8[1]);
|
|
<a name="l139"></a> </span><span class=cFD>ICU16</span><span class=cF0>(tmpi,i.u8[2]<<8+0xFF);
|
|
<a name="l140"></a> </span><span class=cF7>}</span><span class=cF0>
|
|
<a name="l141"></a> </span><span class=cFD>ICModr2</span><span class=cF0>(tmpi,i,,d1,rip);
|
|
<a name="l142"></a> </span><span class=cF1>return</span><span class=cF0>;
|
|
<a name="l143"></a> }
|
|
<a name="l144"></a> </span><span class=cF1>if</span><span class=cF0> (</span><span class=cF3>I8_MIN</span><span class=cF0><=d<=</span><span class=cF3>I8_MAX</span><span class=cF0> || t1&</span><span class=cF7>(</span><span class=cF3>RTG_MASK</span><span class=cF0>-</span><span class=cF3>RTF_UNSIGNED</span><span class=cF7>)</span><span class=cF0>==</span><span class=cF3>RT_I8</span><span class=cF0>) {
|
|
<a name="l145"></a> </span><span class=cFD>ICSlashOp</span><span class=cF0>(tmpi,t1,r1,d1,SLASH_OP_IMM_U8+op.u8[1],rip+1);
|
|
<a name="l146"></a> </span><span class=cFD>ICU8</span><span class=cF0>(tmpi,d);
|
|
<a name="l147"></a> </span><span class=cF1>return</span><span class=cF0>;
|
|
<a name="l148"></a> }
|
|
<a name="l149"></a> </span><span class=cF1>if</span><span class=cF0> (</span><span class=cF3>I32_MIN</span><span class=cF0><=d<=</span><span class=cF3>I32_MAX</span><span class=cF0> || t1.raw_type<</span><span class=cF3>RT_I64</span><span class=cF0>) {
|
|
<a name="l150"></a> </span><span class=cFD>ICSlashOp</span><span class=cF0>(tmpi,t1,r1,d1,SLASH_OP_IMM_U32+op.u8[1],rip);
|
|
<a name="l151"></a> </span><span class=cF1>if</span><span class=cF0> (t1&</span><span class=cF7>(</span><span class=cF3>RTG_MASK</span><span class=cF0>-</span><span class=cF3>RTF_UNSIGNED</span><span class=cF7>)</span><span class=cF0>==</span><span class=cF3>RT_I16</span><span class=cF0>)
|
|
<a name="l152"></a> </span><span class=cFD>ICU16</span><span class=cF0>(tmpi,d);
|
|
<a name="l153"></a> </span><span class=cF1>else</span><span class=cF0>
|
|
<a name="l154"></a> </span><span class=cFD>ICU32</span><span class=cF0>(tmpi,d);
|
|
<a name="l155"></a> </span><span class=cF1>return</span><span class=cF0>;
|
|
<a name="l156"></a> }
|
|
<a name="l157"></a> </span><span class=cF1>break</span><span class=cF0>;
|
|
<a name="l158"></a> </span><span class=cF1>case</span><span class=cF0> </span><span class=cF3>MDf_STK</span><span class=cF0>:
|
|
<a name="l159"></a> </span><span class=cFD>ICAddSubEctImm</span><span class=cF0>(tmpi,</span><span class=cF3>MDF_REG</span><span class=cF0>+</span><span class=cF3>RT_I64</span><span class=cF0>,</span><span class=cF3>REG_RAX</span><span class=cF0>,0,t2,r2,d2,d,op,rip);
|
|
<a name="l160"></a> </span><span class=cFD>ICPushRegs</span><span class=cF0>(tmpi,1<<</span><span class=cF3>REG_RAX</span><span class=cF0>);
|
|
<a name="l161"></a> </span><span class=cF1>return</span><span class=cF0>;
|
|
<a name="l162"></a> </span><span class=cF7>}</span><span class=cF0>
|
|
<a name="l163"></a> </span><span class=cFD>ICAddEct</span><span class=cF0>(tmpi,t1,r1,d1,</span><span class=cF3>MDF_IMM</span><span class=cF0>+</span><span class=cF3>RT_I64</span><span class=cF0>,0,d,t2,r2,d2,op.u8[0],rip);
|
|
<a name="l164"></a>}
|
|
<a name="l165"></a>
|
|
<a name="l166"></a></span><span class=cF1>U0</span><span class=cF0> </span><span class=cFD>ICSub</span><span class=cF0>(</span><span class=cF9>CIntermediateCode</span><span class=cF0> *tmpi,</span><span class=cF9>CICType</span><span class=cF0> t1,</span><span class=cF9>I64</span><span class=cF0> r1,</span><span class=cF9>I64</span><span class=cF0> d1,
|
|
<a name="l167"></a> </span><span class=cF9>CICType</span><span class=cF0> t2,</span><span class=cF9>I64</span><span class=cF0> r2,</span><span class=cF9>I64</span><span class=cF0> d2,</span><span class=cF9>CICType</span><span class=cF0> t3,</span><span class=cF9>I64</span><span class=cF0> r3,</span><span class=cF9>I64</span><span class=cF0> d3,</span><span class=cF9>I64</span><span class=cF0> rip)
|
|
<a name="l168"></a>{
|
|
<a name="l169"></a> </span><span class=cF9>I64</span><span class=cF0> i=0x48,op=0x2B;
|
|
<a name="l170"></a> </span><span class=cF1>Bool</span><span class=cF0> swap=</span><span class=cF3>FALSE</span><span class=cF0>;
|
|
<a name="l171"></a> </span><span class=cF1>if</span><span class=cF0> (r3!=</span><span class=cF3>REG_RAX</span><span class=cF0>) </span><span class=cF7>{</span><span class=cF0>
|
|
<a name="l172"></a> swap=</span><span class=cF3>TRUE</span><span class=cF0>;
|
|
<a name="l173"></a> </span><span class=cF5>SwapI64</span><span class=cF0>(&t2,&t3);
|
|
<a name="l174"></a> </span><span class=cF5>SwapI64</span><span class=cF0>(&r2,&r3);
|
|
<a name="l175"></a> </span><span class=cF5>SwapI64</span><span class=cF0>(&d2,&d3);
|
|
<a name="l176"></a> </span><span class=cF7>}</span><span class=cF0>
|
|
<a name="l177"></a> </span><span class=cF1>if</span><span class=cF0> (t2.raw_type>=</span><span class=cF3>RT_I64</span><span class=cF0> && r2.u8[0]!=</span><span class=cF3>REG_RAX</span><span class=cF0> &&
|
|
<a name="l178"></a> </span><span class=cF7>(</span><span class=cF0>!(t2&</span><span class=cF3>MDF_SIB</span><span class=cF0>) || r2.u8[1]&15!=</span><span class=cF3>REG_RAX</span><span class=cF7>)</span><span class=cF0> && t2&</span><span class=cF3>MDG_REG_DISP_SIB_RIP</span><span class=cF0>) </span><span class=cF7>{</span><span class=cF0>
|
|
<a name="l179"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi,</span><span class=cF3>MDF_REG</span><span class=cF0>+</span><span class=cF3>RT_I64</span><span class=cF0>,</span><span class=cF3>REG_RAX</span><span class=cF0>,0,t3,r3,d3,rip);
|
|
<a name="l180"></a> </span><span class=cF1>if</span><span class=cF0> (!swap) {
|
|
<a name="l181"></a> op=0x03;
|
|
<a name="l182"></a> </span><span class=cFD>ICU24</span><span class=cF0>(tmpi,0xD8F748);
|
|
<a name="l183"></a> }
|
|
<a name="l184"></a> i=</span><span class=cFD>ICModr1</span><span class=cF0>(</span><span class=cF3>REG_RAX</span><span class=cF0>,t2,r2,d2);
|
|
<a name="l185"></a> </span><span class=cF1>if</span><span class=cF0> (tmpi->ic_flags&</span><span class=cF3>ICF_LOCK</span><span class=cF0>)
|
|
<a name="l186"></a> </span><span class=cFD>ICU8</span><span class=cF0>(tmpi,</span><span class=cF3>OC_LOCK_PREFIX</span><span class=cF0>);
|
|
<a name="l187"></a> </span><span class=cFD>ICRex</span><span class=cF0>(tmpi,i.u8[1]);
|
|
<a name="l188"></a> </span><span class=cFD>ICU16</span><span class=cF0>(tmpi,i.u8[2]<<8+op);
|
|
<a name="l189"></a> </span><span class=cFD>ICModr2</span><span class=cF0>(tmpi,i,,d2,rip);
|
|
<a name="l190"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi,t1,r1,d1,</span><span class=cF3>MDF_REG</span><span class=cF0>+</span><span class=cF3>RT_I64</span><span class=cF0>,</span><span class=cF3>REG_RAX</span><span class=cF0>,0,rip);
|
|
<a name="l191"></a> </span><span class=cF7>}</span><span class=cF0> </span><span class=cF1>else</span><span class=cF0> </span><span class=cF7>{</span><span class=cF0>
|
|
<a name="l192"></a> </span><span class=cF1>if</span><span class=cF0> (!</span><span class=cF7>(</span><span class=cF0>t3&</span><span class=cF3>MDF_REG</span><span class=cF7>)</span><span class=cF0> || t3.raw_type<</span><span class=cF3>RT_I64</span><span class=cF0>) {
|
|
<a name="l193"></a> </span><span class=cF1>if</span><span class=cF0> (swap) </span><span class=cF7>{</span><span class=cF0>
|
|
<a name="l194"></a> swap=</span><span class=cF3>FALSE</span><span class=cF0>;
|
|
<a name="l195"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi,</span><span class=cF3>MDF_REG</span><span class=cF0>+</span><span class=cF3>RT_I64</span><span class=cF0>,</span><span class=cF3>REG_RAX</span><span class=cF0>,0,t3,r3,d3,rip);
|
|
<a name="l196"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi,</span><span class=cF3>MDF_REG</span><span class=cF0>+</span><span class=cF3>RT_I64</span><span class=cF0>,</span><span class=cF3>REG_RCX</span><span class=cF0>,0,t2,r2,d2,rip);
|
|
<a name="l197"></a> r2=</span><span class=cF3>REG_RAX</span><span class=cF0>;
|
|
<a name="l198"></a> r3=</span><span class=cF3>REG_RCX</span><span class=cF0>;
|
|
<a name="l199"></a> </span><span class=cF7>}</span><span class=cF0> </span><span class=cF1>else</span><span class=cF0> </span><span class=cF7>{</span><span class=cF0>
|
|
<a name="l200"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi,</span><span class=cF3>MDF_REG</span><span class=cF0>+</span><span class=cF3>RT_I64</span><span class=cF0>,</span><span class=cF3>REG_RAX</span><span class=cF0>,0,t3,r3,d3,rip);
|
|
<a name="l201"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi,</span><span class=cF3>MDF_REG</span><span class=cF0>+</span><span class=cF3>RT_I64</span><span class=cF0>,</span><span class=cF3>REG_RCX</span><span class=cF0>,0,t2,r2,d2,rip);
|
|
<a name="l202"></a> r3=</span><span class=cF3>REG_RAX</span><span class=cF0>;
|
|
<a name="l203"></a> r2=</span><span class=cF3>REG_RCX</span><span class=cF0>;
|
|
<a name="l204"></a> </span><span class=cF7>}</span><span class=cF0>
|
|
<a name="l205"></a> } </span><span class=cF1>else</span><span class=cF0> {
|
|
<a name="l206"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi,</span><span class=cF3>MDF_REG</span><span class=cF0>+</span><span class=cF3>RT_I64</span><span class=cF0>,</span><span class=cF3>REG_RCX</span><span class=cF0>,0,t2,r2,d2,rip);
|
|
<a name="l207"></a> r2=</span><span class=cF3>REG_RCX</span><span class=cF0>;
|
|
<a name="l208"></a> }
|
|
<a name="l209"></a> </span><span class=cF1>if</span><span class=cF0> (swap) {
|
|
<a name="l210"></a> op=0x03;
|
|
<a name="l211"></a> </span><span class=cFD>ICU24</span><span class=cF0>(tmpi,0xD9F748);
|
|
<a name="l212"></a> }
|
|
<a name="l213"></a> </span><span class=cF1>if</span><span class=cF0> (r3>7)
|
|
<a name="l214"></a> i++;
|
|
<a name="l215"></a> </span><span class=cF1>if</span><span class=cF0> (r2>7)
|
|
<a name="l216"></a> i+=4;
|
|
<a name="l217"></a> </span><span class=cF1>if</span><span class=cF0> (tmpi->ic_flags&</span><span class=cF3>ICF_LOCK</span><span class=cF0>)
|
|
<a name="l218"></a> </span><span class=cFD>ICU8</span><span class=cF0>(tmpi,</span><span class=cF3>OC_LOCK_PREFIX</span><span class=cF0>);
|
|
<a name="l219"></a> </span><span class=cFD>ICU24</span><span class=cF0>(tmpi,0xC00000+i+</span><span class=cF7>(</span><span class=cF0>r3&7</span><span class=cF7>)</span><span class=cF0><<16+</span><span class=cF7>(</span><span class=cF0>r2&7</span><span class=cF7>)</span><span class=cF0><<19+op<<8);
|
|
<a name="l220"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi,t1,r1,d1,</span><span class=cF3>MDF_REG</span><span class=cF0>+</span><span class=cF3>RT_I64</span><span class=cF0>,r2,0,rip);
|
|
<a name="l221"></a> </span><span class=cF7>}</span><span class=cF0>
|
|
<a name="l222"></a>}
|
|
<a name="l223"></a>
|
|
<a name="l224"></a></span><span class=cF1>U0</span><span class=cF0> </span><span class=cFD>ICMul</span><span class=cF0>(</span><span class=cF9>CIntermediateCode</span><span class=cF0> *tmpi,</span><span class=cF9>I64</span><span class=cF0> rip)
|
|
<a name="l225"></a>{
|
|
<a name="l226"></a> </span><span class=cF9>I64</span><span class=cF0> i,r2,r=</span><span class=cF3>REG_RAX</span><span class=cF0>,j;
|
|
<a name="l227"></a> </span><span class=cF9>CICArg</span><span class=cF0> *arg1,*arg2;
|
|
<a name="l228"></a> </span><span class=cF1>Bool</span><span class=cF0> alt;
|
|
<a name="l229"></a> </span><span class=cF1>if</span><span class=cF0> (tmpi->arg1.type&</span><span class=cF3>MDF_IMM</span><span class=cF0>) </span><span class=cF7>{</span><span class=cF0>
|
|
<a name="l230"></a> arg1=&tmpi->arg2;
|
|
<a name="l231"></a> arg2=&tmpi->arg1;
|
|
<a name="l232"></a> alt=</span><span class=cF3>TRUE</span><span class=cF0>;
|
|
<a name="l233"></a> </span><span class=cF7>}</span><span class=cF0> </span><span class=cF1>else</span><span class=cF0> </span><span class=cF7>{</span><span class=cF0>
|
|
<a name="l234"></a> arg1=&tmpi->arg1;
|
|
<a name="l235"></a> arg2=&tmpi->arg2;
|
|
<a name="l236"></a> alt=</span><span class=cF3>FALSE</span><span class=cF0>;
|
|
<a name="l237"></a> </span><span class=cF7>}</span><span class=cF0>
|
|
<a name="l238"></a> i=arg2->disp;
|
|
<a name="l239"></a> </span><span class=cF1>if</span><span class=cF0> (!</span><span class=cF7>(</span><span class=cF0>tmpi->ic_class->raw_type&</span><span class=cF3>RTF_UNSIGNED</span><span class=cF7>)</span><span class=cF0> &&
|
|
<a name="l240"></a> arg2->type&</span><span class=cF3>MDF_IMM</span><span class=cF0> && </span><span class=cF3>I32_MIN</span><span class=cF0><=i<=</span><span class=cF3>I32_MAX</span><span class=cF0>) </span><span class=cF7>{</span><span class=cF0>
|
|
<a name="l241"></a> </span><span class=cF1>if</span><span class=cF0> (tmpi->res.type==</span><span class=cF3>MDF_REG</span><span class=cF0>+</span><span class=cF3>RT_I64</span><span class=cF0>) {
|
|
<a name="l242"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi,tmpi->res.type,tmpi->res.</span><span class=cF1>reg</span><span class=cF0>,tmpi->res.disp,
|
|
<a name="l243"></a> arg1->type,arg1-></span><span class=cF1>reg</span><span class=cF0>,arg1->disp,rip);
|
|
<a name="l244"></a> r=tmpi->res.</span><span class=cF1>reg</span><span class=cF0>;
|
|
<a name="l245"></a> } </span><span class=cF1>else</span><span class=cF0>
|
|
<a name="l246"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi,</span><span class=cF3>MDF_REG</span><span class=cF0>+</span><span class=cF3>RT_I64</span><span class=cF0>,</span><span class=cF3>REG_RAX</span><span class=cF0>,0,arg1->type,arg1-></span><span class=cF1>reg</span><span class=cF0>,arg1->disp,rip);
|
|
<a name="l247"></a> </span><span class=cF1>if</span><span class=cF0> (r>7)
|
|
<a name="l248"></a> j=0xC0004D;
|
|
<a name="l249"></a> </span><span class=cF1>else</span><span class=cF0>
|
|
<a name="l250"></a> j=0xC00048;
|
|
<a name="l251"></a> </span><span class=cF1>if</span><span class=cF0> (</span><span class=cF3>I8_MIN</span><span class=cF0><=i<=</span><span class=cF3>I8_MAX</span><span class=cF0>)
|
|
<a name="l252"></a> </span><span class=cFD>ICU32</span><span class=cF0>(tmpi,i<<24+0x6B00+j+</span><span class=cF7>(</span><span class=cF0>r&7</span><span class=cF7>)</span><span class=cF0><<16+</span><span class=cF7>(</span><span class=cF0>r&7</span><span class=cF7>)</span><span class=cF0><<19);
|
|
<a name="l253"></a> </span><span class=cF1>else</span><span class=cF0> {
|
|
<a name="l254"></a> </span><span class=cFD>ICU24</span><span class=cF0>(tmpi,0x6900+j+</span><span class=cF7>(</span><span class=cF0>r&7</span><span class=cF7>)</span><span class=cF0><<16+</span><span class=cF7>(</span><span class=cF0>r&7</span><span class=cF7>)</span><span class=cF0><<19);
|
|
<a name="l255"></a> </span><span class=cFD>ICU32</span><span class=cF0>(tmpi,i);
|
|
<a name="l256"></a> }
|
|
<a name="l257"></a> </span><span class=cF7>}</span><span class=cF0> </span><span class=cF1>else</span><span class=cF0> </span><span class=cF7>{</span><span class=cF0>
|
|
<a name="l258"></a> </span><span class=cF1>if</span><span class=cF0> (tmpi->ic_class->raw_type&</span><span class=cF3>RTF_UNSIGNED</span><span class=cF0>)
|
|
<a name="l259"></a> i=0xE0F748;
|
|
<a name="l260"></a> </span><span class=cF1>else</span><span class=cF0>
|
|
<a name="l261"></a> i=0xE8F748;
|
|
<a name="l262"></a> </span><span class=cF1>if</span><span class=cF0> (alt) {
|
|
<a name="l263"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi,</span><span class=cF3>MDF_REG</span><span class=cF0>+</span><span class=cF3>RT_I64</span><span class=cF0>,</span><span class=cF3>REG_RCX</span><span class=cF0>,0,arg1->type,arg1-></span><span class=cF1>reg</span><span class=cF0>,arg1->disp,rip);
|
|
<a name="l264"></a> r2=</span><span class=cF3>REG_RCX</span><span class=cF0>;
|
|
<a name="l265"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi,</span><span class=cF3>MDF_REG</span><span class=cF0>+</span><span class=cF3>RT_I64</span><span class=cF0>,</span><span class=cF3>REG_RAX</span><span class=cF0>,0,arg2->type,arg2-></span><span class=cF1>reg</span><span class=cF0>,arg2->disp,rip);
|
|
<a name="l266"></a> } </span><span class=cF1>else</span><span class=cF0> {
|
|
<a name="l267"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi,</span><span class=cF3>MDF_REG</span><span class=cF0>+</span><span class=cF3>RT_I64</span><span class=cF0>,</span><span class=cF3>REG_RAX</span><span class=cF0>,0,arg2->type,arg2-></span><span class=cF1>reg</span><span class=cF0>,arg2->disp,rip);
|
|
<a name="l268"></a> </span><span class=cF1>if</span><span class=cF0> (!</span><span class=cF7>(</span><span class=cF0>arg1->type&</span><span class=cF3>MDF_REG</span><span class=cF7>)</span><span class=cF0> || arg1->type.raw_type<</span><span class=cF3>RT_I64</span><span class=cF0>) </span><span class=cF7>{</span><span class=cF0>
|
|
<a name="l269"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi,</span><span class=cF3>MDF_REG</span><span class=cF0>+</span><span class=cF3>RT_I64</span><span class=cF0>,</span><span class=cF3>REG_RCX</span><span class=cF0>,0,
|
|
<a name="l270"></a> arg1->type,arg1-></span><span class=cF1>reg</span><span class=cF0>,arg1->disp,rip);
|
|
<a name="l271"></a> r2=</span><span class=cF3>REG_RCX</span><span class=cF0>;
|
|
<a name="l272"></a> </span><span class=cF7>}</span><span class=cF0> </span><span class=cF1>else</span><span class=cF0>
|
|
<a name="l273"></a> r2=arg1-></span><span class=cF1>reg</span><span class=cF0>;
|
|
<a name="l274"></a> }
|
|
<a name="l275"></a> </span><span class=cF1>if</span><span class=cF0> (r2>7) {
|
|
<a name="l276"></a> i++;
|
|
<a name="l277"></a> r2&=7;
|
|
<a name="l278"></a> }
|
|
<a name="l279"></a> </span><span class=cFD>ICU24</span><span class=cF0>(tmpi,i+r2<<16);
|
|
<a name="l280"></a> </span><span class=cF7>}</span><span class=cF0>
|
|
<a name="l281"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi,tmpi->res.type,tmpi->res.</span><span class=cF1>reg</span><span class=cF0>,tmpi->res.disp,
|
|
<a name="l282"></a> </span><span class=cF3>MDF_REG</span><span class=cF0>+</span><span class=cF3>RT_I64</span><span class=cF0>,r,0,rip);
|
|
<a name="l283"></a>}
|
|
<a name="l284"></a>
|
|
<a name="l285"></a></span><span class=cF1>U0</span><span class=cF0> </span><span class=cFD>ICMulEqu</span><span class=cF0>(</span><span class=cF9>CIntermediateCode</span><span class=cF0> *tmpi,</span><span class=cF9>I64</span><span class=cF0> rip)
|
|
<a name="l286"></a>{
|
|
<a name="l287"></a> </span><span class=cF9>I64</span><span class=cF0> i=tmpi->arg2.disp,r=</span><span class=cF3>REG_RAX</span><span class=cF0>,j;
|
|
<a name="l288"></a> </span><span class=cF1>if</span><span class=cF0> (!</span><span class=cF7>(</span><span class=cF0>tmpi->ic_class->raw_type&</span><span class=cF3>RTF_UNSIGNED</span><span class=cF7>)</span><span class=cF0> &&
|
|
<a name="l289"></a> tmpi->arg2.type&</span><span class=cF3>MDF_IMM</span><span class=cF0> && </span><span class=cF3>I32_MIN</span><span class=cF0><=i<=</span><span class=cF3>I32_MAX</span><span class=cF0>) </span><span class=cF7>{</span><span class=cF0>
|
|
<a name="l290"></a> </span><span class=cF1>if</span><span class=cF0> (tmpi->ic_flags & </span><span class=cF3>ICF_BY_VAL</span><span class=cF0>) {
|
|
<a name="l291"></a> </span><span class=cF1>if</span><span class=cF0> (tmpi->arg1.type==</span><span class=cF3>MDF_REG</span><span class=cF0>+</span><span class=cF3>RT_I64</span><span class=cF0>)
|
|
<a name="l292"></a> r=tmpi->arg1.</span><span class=cF1>reg</span><span class=cF0>;
|
|
<a name="l293"></a> </span><span class=cF1>else</span><span class=cF0>
|
|
<a name="l294"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi,</span><span class=cF3>MDF_REG</span><span class=cF0>+</span><span class=cF3>RT_I64</span><span class=cF0>,</span><span class=cF3>REG_RAX</span><span class=cF0>,0,
|
|
<a name="l295"></a> tmpi->arg1.type&</span><span class=cF3>MDG_MASK</span><span class=cF0>+tmpi->arg1_type_pointed_to,
|
|
<a name="l296"></a> tmpi->arg1.</span><span class=cF1>reg</span><span class=cF0>,tmpi->arg1.disp,rip);
|
|
<a name="l297"></a> </span><span class=cF1>if</span><span class=cF0> (r>7)
|
|
<a name="l298"></a> j=0xC0004D;
|
|
<a name="l299"></a> </span><span class=cF1>else</span><span class=cF0>
|
|
<a name="l300"></a> j=0xC00048;
|
|
<a name="l301"></a> </span><span class=cF1>if</span><span class=cF0> (</span><span class=cF3>I8_MIN</span><span class=cF0><=i<=</span><span class=cF3>I8_MAX</span><span class=cF0>)
|
|
<a name="l302"></a> </span><span class=cFD>ICU32</span><span class=cF0>(tmpi,i<<24+0x6B00+j+</span><span class=cF7>(</span><span class=cF0>r&7</span><span class=cF7>)</span><span class=cF0><<16+</span><span class=cF7>(</span><span class=cF0>r&7</span><span class=cF7>)</span><span class=cF0><<19);
|
|
<a name="l303"></a> </span><span class=cF1>else</span><span class=cF0> </span><span class=cF7>{</span><span class=cF0>
|
|
<a name="l304"></a> </span><span class=cFD>ICU24</span><span class=cF0>(tmpi,0x6900+j+</span><span class=cF7>(</span><span class=cF0>r&7</span><span class=cF7>)</span><span class=cF0><<16+</span><span class=cF7>(</span><span class=cF0>r&7</span><span class=cF7>)</span><span class=cF0><<19);
|
|
<a name="l305"></a> </span><span class=cFD>ICU32</span><span class=cF0>(tmpi,i);
|
|
<a name="l306"></a> </span><span class=cF7>}</span><span class=cF0>
|
|
<a name="l307"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi,tmpi->arg1.type&</span><span class=cF3>MDG_MASK</span><span class=cF0>+tmpi->arg1_type_pointed_to,
|
|
<a name="l308"></a> tmpi->arg1.</span><span class=cF1>reg</span><span class=cF0>,tmpi->arg1.disp,</span><span class=cF3>MDF_REG</span><span class=cF0>+</span><span class=cF3>RT_I64</span><span class=cF0>,r,0,rip);
|
|
<a name="l309"></a> } </span><span class=cF1>else</span><span class=cF0> {
|
|
<a name="l310"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi,</span><span class=cF3>MDF_REG</span><span class=cF0>+</span><span class=cF3>RT_I64</span><span class=cF0>,</span><span class=cF3>REG_RCX</span><span class=cF0>,0,
|
|
<a name="l311"></a> tmpi->arg1.type,tmpi->arg1.</span><span class=cF1>reg</span><span class=cF0>,tmpi->arg1.disp,rip);
|
|
<a name="l312"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi,</span><span class=cF3>MDF_REG</span><span class=cF0>+</span><span class=cF3>RT_I64</span><span class=cF0>,</span><span class=cF3>REG_RBX</span><span class=cF0>,0,
|
|
<a name="l313"></a> </span><span class=cF3>MDF_DISP</span><span class=cF0>+tmpi->arg1_type_pointed_to,</span><span class=cF3>REG_RCX</span><span class=cF0>,0,rip);
|
|
<a name="l314"></a> r=</span><span class=cF3>REG_RBX</span><span class=cF0>;
|
|
<a name="l315"></a> </span><span class=cF1>if</span><span class=cF0> (</span><span class=cF3>I8_MIN</span><span class=cF0><=i<=</span><span class=cF3>I8_MAX</span><span class=cF0>)
|
|
<a name="l316"></a> </span><span class=cFD>ICU32</span><span class=cF0>(tmpi,i<<24+0xDB6B48);
|
|
<a name="l317"></a> </span><span class=cF1>else</span><span class=cF0> </span><span class=cF7>{</span><span class=cF0>
|
|
<a name="l318"></a> </span><span class=cFD>ICU24</span><span class=cF0>(tmpi,0xDB6948);
|
|
<a name="l319"></a> </span><span class=cFD>ICU32</span><span class=cF0>(tmpi,i);
|
|
<a name="l320"></a> </span><span class=cF7>}</span><span class=cF0>
|
|
<a name="l321"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi,</span><span class=cF3>MDF_DISP</span><span class=cF0>+tmpi->arg1_type_pointed_to,</span><span class=cF3>REG_RCX</span><span class=cF0>,0,
|
|
<a name="l322"></a> </span><span class=cF3>MDF_REG</span><span class=cF0>+</span><span class=cF3>RT_I64</span><span class=cF0>,</span><span class=cF3>REG_RBX</span><span class=cF0>,0,rip);
|
|
<a name="l323"></a> }
|
|
<a name="l324"></a> </span><span class=cF7>}</span><span class=cF0> </span><span class=cF1>else</span><span class=cF0> </span><span class=cF7>{</span><span class=cF0>
|
|
<a name="l325"></a> </span><span class=cF1>if</span><span class=cF0> (tmpi->ic_class->raw_type&</span><span class=cF3>RTF_UNSIGNED</span><span class=cF0>)
|
|
<a name="l326"></a> i=0xE3F748;
|
|
<a name="l327"></a> </span><span class=cF1>else</span><span class=cF0>
|
|
<a name="l328"></a> i=0xEBF748;
|
|
<a name="l329"></a> </span><span class=cF1>if</span><span class=cF0> (tmpi->ic_flags & </span><span class=cF3>ICF_BY_VAL</span><span class=cF0>) {
|
|
<a name="l330"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi,</span><span class=cF3>MDF_REG</span><span class=cF0>+</span><span class=cF3>RT_I64</span><span class=cF0>,</span><span class=cF3>REG_RAX</span><span class=cF0>,0,
|
|
<a name="l331"></a> tmpi->arg2.type,tmpi->arg2.</span><span class=cF1>reg</span><span class=cF0>,tmpi->arg2.disp,rip);
|
|
<a name="l332"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi,</span><span class=cF3>MDF_REG</span><span class=cF0>+</span><span class=cF3>RT_I64</span><span class=cF0>,</span><span class=cF3>REG_RBX</span><span class=cF0>,0,
|
|
<a name="l333"></a> tmpi->arg1.type&</span><span class=cF3>MDG_MASK</span><span class=cF0>+tmpi->arg1_type_pointed_to,
|
|
<a name="l334"></a> tmpi->arg1.</span><span class=cF1>reg</span><span class=cF0>,tmpi->arg1.disp,rip);
|
|
<a name="l335"></a> </span><span class=cFD>ICU24</span><span class=cF0>(tmpi,i);
|
|
<a name="l336"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi,tmpi->arg1.type&</span><span class=cF3>MDG_MASK</span><span class=cF0>+tmpi->arg1_type_pointed_to,
|
|
<a name="l337"></a> tmpi->arg1.</span><span class=cF1>reg</span><span class=cF0>,tmpi->arg1.disp,</span><span class=cF3>MDF_REG</span><span class=cF0>+</span><span class=cF3>RT_I64</span><span class=cF0>,</span><span class=cF3>REG_RAX</span><span class=cF0>,0,rip);
|
|
<a name="l338"></a> } </span><span class=cF1>else</span><span class=cF0> {
|
|
<a name="l339"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi,</span><span class=cF3>MDF_REG</span><span class=cF0>+</span><span class=cF3>RT_I64</span><span class=cF0>,</span><span class=cF3>REG_RAX</span><span class=cF0>,0,
|
|
<a name="l340"></a> tmpi->arg2.type,tmpi->arg2.</span><span class=cF1>reg</span><span class=cF0>,tmpi->arg2.disp,rip);
|
|
<a name="l341"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi,</span><span class=cF3>MDF_REG</span><span class=cF0>+</span><span class=cF3>RT_I64</span><span class=cF0>,</span><span class=cF3>REG_RCX</span><span class=cF0>,0,
|
|
<a name="l342"></a> tmpi->arg1.type,tmpi->arg1.</span><span class=cF1>reg</span><span class=cF0>,tmpi->arg1.disp,rip);
|
|
<a name="l343"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi,</span><span class=cF3>MDF_REG</span><span class=cF0>+</span><span class=cF3>RT_I64</span><span class=cF0>,</span><span class=cF3>REG_RBX</span><span class=cF0>,0,
|
|
<a name="l344"></a> </span><span class=cF3>MDF_DISP</span><span class=cF0>+tmpi->arg1_type_pointed_to,</span><span class=cF3>REG_RCX</span><span class=cF0>,0,rip);
|
|
<a name="l345"></a> </span><span class=cFD>ICU24</span><span class=cF0>(tmpi,i);
|
|
<a name="l346"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi,</span><span class=cF3>MDF_DISP</span><span class=cF0>+tmpi->arg1_type_pointed_to,</span><span class=cF3>REG_RCX</span><span class=cF0>,0,
|
|
<a name="l347"></a> </span><span class=cF3>MDF_REG</span><span class=cF0>+</span><span class=cF3>RT_I64</span><span class=cF0>,</span><span class=cF3>REG_RAX</span><span class=cF0>,0,rip);
|
|
<a name="l348"></a> }
|
|
<a name="l349"></a> </span><span class=cF7>}</span><span class=cF0>
|
|
<a name="l350"></a> </span><span class=cF1>if</span><span class=cF0> (tmpi->res.type.mode)
|
|
<a name="l351"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi,tmpi->res.type,tmpi->res.</span><span class=cF1>reg</span><span class=cF0>,tmpi->res.disp,
|
|
<a name="l352"></a> </span><span class=cF3>MDF_REG</span><span class=cF0>+</span><span class=cF3>RT_I64</span><span class=cF0>,r,0,rip);
|
|
<a name="l353"></a>}
|
|
<a name="l354"></a>
|
|
<a name="l355"></a></span><span class=cF1>U0</span><span class=cF0> </span><span class=cFD>ICDiv</span><span class=cF0>(</span><span class=cF9>CIntermediateCode</span><span class=cF0> *tmpi,</span><span class=cF9>I64</span><span class=cF0> rip)
|
|
<a name="l356"></a>{
|
|
<a name="l357"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi,</span><span class=cF3>MDF_REG</span><span class=cF0>+</span><span class=cF3>RT_I64</span><span class=cF0>,</span><span class=cF3>REG_RCX</span><span class=cF0>,0,
|
|
<a name="l358"></a> tmpi->arg2.type,tmpi->arg2.</span><span class=cF1>reg</span><span class=cF0>,tmpi->arg2.disp,rip);
|
|
<a name="l359"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi,</span><span class=cF3>MDF_REG</span><span class=cF0>+</span><span class=cF3>RT_I64</span><span class=cF0>,</span><span class=cF3>REG_RAX</span><span class=cF0>,0,
|
|
<a name="l360"></a> tmpi->arg1.type,tmpi->arg1.</span><span class=cF1>reg</span><span class=cF0>,tmpi->arg1.disp,rip);
|
|
<a name="l361"></a> </span><span class=cF1>if</span><span class=cF0> (tmpi->ic_class->raw_type&</span><span class=cF3>RTF_UNSIGNED</span><span class=cF0>) </span><span class=cF7>{</span><span class=cF0>
|
|
<a name="l362"></a> </span><span class=cFD>ICZero</span><span class=cF0>(tmpi,</span><span class=cF3>REG_RDX</span><span class=cF0>);
|
|
<a name="l363"></a> </span><span class=cFD>ICU24</span><span class=cF0>(tmpi,0xF1F748);
|
|
<a name="l364"></a> </span><span class=cF7>}</span><span class=cF0> </span><span class=cF1>else</span><span class=cF0> </span><span class=cF7>{</span><span class=cF0>
|
|
<a name="l365"></a> </span><span class=cFD>ICU16</span><span class=cF0>(tmpi,0x9948);
|
|
<a name="l366"></a> </span><span class=cFD>ICU24</span><span class=cF0>(tmpi,0xF9F748);
|
|
<a name="l367"></a> </span><span class=cF7>}</span><span class=cF0>
|
|
<a name="l368"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi,tmpi->res.type,tmpi->res.</span><span class=cF1>reg</span><span class=cF0>,tmpi->res.disp,
|
|
<a name="l369"></a> </span><span class=cF3>MDF_REG</span><span class=cF0>+</span><span class=cF3>RT_I64</span><span class=cF0>,</span><span class=cF3>REG_RAX</span><span class=cF0>,0,rip);
|
|
<a name="l370"></a>}
|
|
<a name="l371"></a>
|
|
<a name="l372"></a></span><span class=cF1>U0</span><span class=cF0> </span><span class=cFD>ICDivEqu</span><span class=cF0>(</span><span class=cF9>CIntermediateCode</span><span class=cF0> *tmpi,</span><span class=cF1>Bool</span><span class=cF0> is_mod,</span><span class=cF9>I64</span><span class=cF0> rip)
|
|
<a name="l373"></a>{
|
|
<a name="l374"></a> </span><span class=cF1>if</span><span class=cF0> (tmpi->ic_flags & </span><span class=cF3>ICF_BY_VAL</span><span class=cF0>) </span><span class=cF7>{</span><span class=cF0>
|
|
<a name="l375"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi,</span><span class=cF3>MDF_REG</span><span class=cF0>+</span><span class=cF3>RT_I64</span><span class=cF0>,</span><span class=cF3>REG_RCX</span><span class=cF0>,0,
|
|
<a name="l376"></a> tmpi->arg2.type,tmpi->arg2.</span><span class=cF1>reg</span><span class=cF0>,tmpi->arg2.disp,rip);
|
|
<a name="l377"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi,</span><span class=cF3>MDF_REG</span><span class=cF0>+</span><span class=cF3>RT_I64</span><span class=cF0>,</span><span class=cF3>REG_RAX</span><span class=cF0>,0,
|
|
<a name="l378"></a> tmpi->arg1.type&</span><span class=cF3>MDG_MASK</span><span class=cF0>+tmpi->arg1_type_pointed_to,
|
|
<a name="l379"></a> tmpi->arg1.</span><span class=cF1>reg</span><span class=cF0>,tmpi->arg1.disp,rip);
|
|
<a name="l380"></a> </span><span class=cF1>if</span><span class=cF0> (tmpi->ic_class->raw_type&</span><span class=cF3>RTF_UNSIGNED</span><span class=cF0>) {
|
|
<a name="l381"></a> </span><span class=cFD>ICZero</span><span class=cF0>(tmpi,</span><span class=cF3>REG_RDX</span><span class=cF0>);
|
|
<a name="l382"></a> </span><span class=cFD>ICU24</span><span class=cF0>(tmpi,0xF1F748);
|
|
<a name="l383"></a> } </span><span class=cF1>else</span><span class=cF0> {
|
|
<a name="l384"></a> </span><span class=cFD>ICU16</span><span class=cF0>(tmpi,0x9948);
|
|
<a name="l385"></a> </span><span class=cFD>ICU24</span><span class=cF0>(tmpi,0xF9F748);
|
|
<a name="l386"></a> }
|
|
<a name="l387"></a> </span><span class=cF1>if</span><span class=cF0> (is_mod)
|
|
<a name="l388"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi,tmpi->arg1.type&</span><span class=cF3>MDG_MASK</span><span class=cF0>+tmpi->arg1_type_pointed_to,
|
|
<a name="l389"></a> tmpi->arg1.</span><span class=cF1>reg</span><span class=cF0>,tmpi->arg1.disp,</span><span class=cF3>MDF_REG</span><span class=cF0>+</span><span class=cF3>RT_I64</span><span class=cF0>,</span><span class=cF3>REG_RDX</span><span class=cF0>,0,rip);
|
|
<a name="l390"></a> </span><span class=cF1>else</span><span class=cF0>
|
|
<a name="l391"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi,tmpi->arg1.type&</span><span class=cF3>MDG_MASK</span><span class=cF0>+tmpi->arg1_type_pointed_to,
|
|
<a name="l392"></a> tmpi->arg1.</span><span class=cF1>reg</span><span class=cF0>,tmpi->arg1.disp,</span><span class=cF3>MDF_REG</span><span class=cF0>+</span><span class=cF3>RT_I64</span><span class=cF0>,</span><span class=cF3>REG_RAX</span><span class=cF0>,0,rip);
|
|
<a name="l393"></a> </span><span class=cF7>}</span><span class=cF0> </span><span class=cF1>else</span><span class=cF0> </span><span class=cF7>{</span><span class=cF0>
|
|
<a name="l394"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi,</span><span class=cF3>MDF_REG</span><span class=cF0>+</span><span class=cF3>RT_I64</span><span class=cF0>,</span><span class=cF3>REG_RCX</span><span class=cF0>,0,
|
|
<a name="l395"></a> tmpi->arg2.type,tmpi->arg2.</span><span class=cF1>reg</span><span class=cF0>,tmpi->arg2.disp,rip);
|
|
<a name="l396"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi,</span><span class=cF3>MDF_REG</span><span class=cF0>+</span><span class=cF3>RT_I64</span><span class=cF0>,</span><span class=cF3>REG_RBX</span><span class=cF0>,0,
|
|
<a name="l397"></a> tmpi->arg1.type,tmpi->arg1.</span><span class=cF1>reg</span><span class=cF0>,tmpi->arg1.disp,rip);
|
|
<a name="l398"></a></span><span class=cF2>//dangerous might clobber RBX in Mov, but it doesn't</span><span class=cF0>
|
|
<a name="l399"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi,</span><span class=cF3>MDF_REG</span><span class=cF0>+</span><span class=cF3>RT_I64</span><span class=cF0>,</span><span class=cF3>REG_RAX</span><span class=cF0>,0,</span><span class=cF3>MDF_DISP</span><span class=cF0>+tmpi->arg1_type_pointed_to,
|
|
<a name="l400"></a> </span><span class=cF3>REG_RBX</span><span class=cF0>,0,rip);
|
|
<a name="l401"></a> </span><span class=cF1>if</span><span class=cF0> (tmpi->ic_class->raw_type&</span><span class=cF3>RTF_UNSIGNED</span><span class=cF0>) {
|
|
<a name="l402"></a> </span><span class=cFD>ICZero</span><span class=cF0>(tmpi,</span><span class=cF3>REG_RDX</span><span class=cF0>);
|
|
<a name="l403"></a> </span><span class=cFD>ICU24</span><span class=cF0>(tmpi,0xF1F748);
|
|
<a name="l404"></a> } </span><span class=cF1>else</span><span class=cF0> {
|
|
<a name="l405"></a> </span><span class=cFD>ICU16</span><span class=cF0>(tmpi,0x9948);
|
|
<a name="l406"></a> </span><span class=cFD>ICU24</span><span class=cF0>(tmpi,0xF9F748);
|
|
<a name="l407"></a> }
|
|
<a name="l408"></a> </span><span class=cF1>if</span><span class=cF0> (is_mod)
|
|
<a name="l409"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi,</span><span class=cF3>MDF_DISP</span><span class=cF0>+tmpi->arg1_type_pointed_to,</span><span class=cF3>REG_RBX</span><span class=cF0>,0,
|
|
<a name="l410"></a> </span><span class=cF3>MDF_REG</span><span class=cF0>+</span><span class=cF3>RT_I64</span><span class=cF0>,</span><span class=cF3>REG_RDX</span><span class=cF0>,0,rip);
|
|
<a name="l411"></a> </span><span class=cF1>else</span><span class=cF0>
|
|
<a name="l412"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi,</span><span class=cF3>MDF_DISP</span><span class=cF0>+tmpi->arg1_type_pointed_to,</span><span class=cF3>REG_RBX</span><span class=cF0>,0,
|
|
<a name="l413"></a> </span><span class=cF3>MDF_REG</span><span class=cF0>+</span><span class=cF3>RT_I64</span><span class=cF0>,</span><span class=cF3>REG_RAX</span><span class=cF0>,0,rip);
|
|
<a name="l414"></a> </span><span class=cF7>}</span><span class=cF0>
|
|
<a name="l415"></a> </span><span class=cF1>if</span><span class=cF0> (tmpi->res.type.mode) </span><span class=cF7>{</span><span class=cF0>
|
|
<a name="l416"></a> </span><span class=cF1>if</span><span class=cF0> (is_mod)
|
|
<a name="l417"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi,tmpi->res.type,tmpi->res.</span><span class=cF1>reg</span><span class=cF0>,tmpi->res.disp,
|
|
<a name="l418"></a> </span><span class=cF3>MDF_REG</span><span class=cF0>+</span><span class=cF3>RT_I64</span><span class=cF0>,</span><span class=cF3>REG_RDX</span><span class=cF0>,0,rip);
|
|
<a name="l419"></a> </span><span class=cF1>else</span><span class=cF0>
|
|
<a name="l420"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi,tmpi->res.type,tmpi->res.</span><span class=cF1>reg</span><span class=cF0>,tmpi->res.disp,
|
|
<a name="l421"></a> </span><span class=cF3>MDF_REG</span><span class=cF0>+</span><span class=cF3>RT_I64</span><span class=cF0>,</span><span class=cF3>REG_RAX</span><span class=cF0>,0,rip);
|
|
<a name="l422"></a> </span><span class=cF7>}</span><span class=cF0>
|
|
<a name="l423"></a>}
|
|
<a name="l424"></a>
|
|
<a name="l425"></a></span><span class=cF1>U0</span><span class=cF0> </span><span class=cFD>ICMod</span><span class=cF0>(</span><span class=cF9>CIntermediateCode</span><span class=cF0> *tmpi,</span><span class=cF9>I64</span><span class=cF0> rip)
|
|
<a name="l426"></a>{
|
|
<a name="l427"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi,</span><span class=cF3>MDF_REG</span><span class=cF0>+</span><span class=cF3>RT_I64</span><span class=cF0>,</span><span class=cF3>REG_RCX</span><span class=cF0>,0,
|
|
<a name="l428"></a> tmpi->arg2.type,tmpi->arg2.</span><span class=cF1>reg</span><span class=cF0>,tmpi->arg2.disp,rip);
|
|
<a name="l429"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi,</span><span class=cF3>MDF_REG</span><span class=cF0>+</span><span class=cF3>RT_I64</span><span class=cF0>,</span><span class=cF3>REG_RAX</span><span class=cF0>,0,
|
|
<a name="l430"></a> tmpi->arg1.type,tmpi->arg1.</span><span class=cF1>reg</span><span class=cF0>,tmpi->arg1.disp,rip);
|
|
<a name="l431"></a> </span><span class=cF1>if</span><span class=cF0> (tmpi->ic_class->raw_type&</span><span class=cF3>RTF_UNSIGNED</span><span class=cF0>) </span><span class=cF7>{</span><span class=cF0>
|
|
<a name="l432"></a> </span><span class=cFD>ICZero</span><span class=cF0>(tmpi,</span><span class=cF3>REG_RDX</span><span class=cF0>);
|
|
<a name="l433"></a> </span><span class=cFD>ICU24</span><span class=cF0>(tmpi,0xF1F748);
|
|
<a name="l434"></a> </span><span class=cF7>}</span><span class=cF0> </span><span class=cF1>else</span><span class=cF0> </span><span class=cF7>{</span><span class=cF0>
|
|
<a name="l435"></a> </span><span class=cFD>ICU16</span><span class=cF0>(tmpi,0x9948);
|
|
<a name="l436"></a> </span><span class=cFD>ICU24</span><span class=cF0>(tmpi,0xF9F748);
|
|
<a name="l437"></a> </span><span class=cF7>}</span><span class=cF0>
|
|
<a name="l438"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi,tmpi->res.type,tmpi->res.</span><span class=cF1>reg</span><span class=cF0>,tmpi->res.disp,
|
|
<a name="l439"></a> </span><span class=cF3>MDF_REG</span><span class=cF0>+</span><span class=cF3>RT_I64</span><span class=cF0>,</span><span class=cF3>REG_RDX</span><span class=cF0>,0,rip);
|
|
<a name="l440"></a>}
|
|
<a name="l441"></a>
|
|
<a name="l442"></a></span><span class=cF1>U0</span><span class=cF0> </span><span class=cFD>ICAddSubEctEqu</span><span class=cF0>(</span><span class=cF9>CIntermediateCode</span><span class=cF0> *tmpi,</span><span class=cF1>U8</span><span class=cF0> type_pointed_to,
|
|
<a name="l443"></a> </span><span class=cF9>CICType</span><span class=cF0> t1,</span><span class=cF9>I64</span><span class=cF0> r1,</span><span class=cF9>I64</span><span class=cF0> d1,</span><span class=cF9>CICType</span><span class=cF0> t2,</span><span class=cF9>I64</span><span class=cF0> r2,</span><span class=cF9>I64</span><span class=cF0> d2,
|
|
<a name="l444"></a> </span><span class=cF9>CICType</span><span class=cF0> t3,</span><span class=cF9>I64</span><span class=cF0> r3,</span><span class=cF9>I64</span><span class=cF0> d3,</span><span class=cF9>I64</span><span class=cF0> op,</span><span class=cF9>I64</span><span class=cF0> rip)
|
|
<a name="l445"></a>{
|
|
<a name="l446"></a> </span><span class=cF1>Bool</span><span class=cF0> done;
|
|
<a name="l447"></a> </span><span class=cF9>I64</span><span class=cF0> res_reg,tmp,i;
|
|
<a name="l448"></a> </span><span class=cF1>if</span><span class=cF0> (tmpi->ic_flags & </span><span class=cF3>ICF_BY_VAL</span><span class=cF0>) </span><span class=cF7>{</span><span class=cF0>
|
|
<a name="l449"></a> </span><span class=cF1>if</span><span class=cF0> (t3&</span><span class=cF3>MDF_IMM</span><span class=cF0>) {
|
|
<a name="l450"></a> </span><span class=cFD>ICAddSubEctImm</span><span class=cF0>(tmpi,t2&</span><span class=cF3>MDG_MASK</span><span class=cF0>+type_pointed_to,r2,d2,t2&</span><span class=cF3>MDG_MASK</span><span class=cF0>+
|
|
<a name="l451"></a> type_pointed_to,r2,d2,d3,op,rip);
|
|
<a name="l452"></a> </span><span class=cF1>if</span><span class=cF0> (t1.mode)
|
|
<a name="l453"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi,t1,r1,d1,t2&</span><span class=cF3>MDG_MASK</span><span class=cF0>+type_pointed_to,r2,d2,rip);
|
|
<a name="l454"></a> </span><span class=cF1>return</span><span class=cF0>;
|
|
<a name="l455"></a> } </span><span class=cF1>else</span><span class=cF0> {
|
|
<a name="l456"></a> done=</span><span class=cF3>FALSE</span><span class=cF0>;
|
|
<a name="l457"></a> </span><span class=cF1>if</span><span class=cF0> (type_pointed_to>=</span><span class=cF3>RT_I64</span><span class=cF0>) </span><span class=cF7>{</span><span class=cF0>
|
|
<a name="l458"></a> </span><span class=cF1>if</span><span class=cF0> (!t1.mode && t2&</span><span class=cF3>MDG_REG_DISP_SIB_RIP</span><span class=cF0>) {
|
|
<a name="l459"></a> </span><span class=cF1>if</span><span class=cF0> (t3&</span><span class=cF3>MDF_REG</span><span class=cF0>)
|
|
<a name="l460"></a> tmp=r3;
|
|
<a name="l461"></a> </span><span class=cF1>else</span><span class=cF0> </span><span class=cF7>{</span><span class=cF0>
|
|
<a name="l462"></a> tmp=</span><span class=cF3>REG_RCX</span><span class=cF0>;
|
|
<a name="l463"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi,</span><span class=cF3>MDF_REG</span><span class=cF0>+</span><span class=cF3>RT_I64</span><span class=cF0>,tmp,0,t3,r3,d3,rip);
|
|
<a name="l464"></a> </span><span class=cF7>}</span><span class=cF0>
|
|
<a name="l465"></a> i=</span><span class=cFD>ICModr1</span><span class=cF0>(tmp,t2&</span><span class=cF3>MDG_MASK</span><span class=cF0>+type_pointed_to,r2,d2);
|
|
<a name="l466"></a> </span><span class=cF1>if</span><span class=cF0> (tmpi->ic_flags&</span><span class=cF3>ICF_LOCK</span><span class=cF0>)
|
|
<a name="l467"></a> </span><span class=cFD>ICU8</span><span class=cF0>(tmpi,</span><span class=cF3>OC_LOCK_PREFIX</span><span class=cF0>);
|
|
<a name="l468"></a> </span><span class=cFD>ICRex</span><span class=cF0>(tmpi,i.u8[1]);
|
|
<a name="l469"></a> </span><span class=cFD>ICU16</span><span class=cF0>(tmpi,i.u8[2]<<8+op.u8[5]);
|
|
<a name="l470"></a> </span><span class=cFD>ICModr2</span><span class=cF0>(tmpi,i,,d2,rip);
|
|
<a name="l471"></a> </span><span class=cF1>return</span><span class=cF0>;
|
|
<a name="l472"></a> }
|
|
<a name="l473"></a> </span><span class=cF1>if</span><span class=cF0> (t3.raw_type>=</span><span class=cF3>RT_I64</span><span class=cF0> && t3&</span><span class=cF3>MDG_REG_DISP_SIB_RIP</span><span class=cF0>) {
|
|
<a name="l474"></a> </span><span class=cF1>if</span><span class=cF0> (t2&</span><span class=cF3>MDF_REG</span><span class=cF0>)
|
|
<a name="l475"></a> res_reg=r2;
|
|
<a name="l476"></a> </span><span class=cF1>else</span><span class=cF0> </span><span class=cF7>{</span><span class=cF0>
|
|
<a name="l477"></a> res_reg=</span><span class=cF3>REG_RCX</span><span class=cF0>;
|
|
<a name="l478"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi,</span><span class=cF3>MDF_REG</span><span class=cF0>+</span><span class=cF3>RT_I64</span><span class=cF0>,</span><span class=cF3>REG_RCX</span><span class=cF0>,0,t2,r2,d2,rip);
|
|
<a name="l479"></a> </span><span class=cF7>}</span><span class=cF0>
|
|
<a name="l480"></a> i=</span><span class=cFD>ICModr1</span><span class=cF0>(res_reg,t3&</span><span class=cF3>MDG_MASK</span><span class=cF0>+type_pointed_to,r3,d3);
|
|
<a name="l481"></a> </span><span class=cF1>if</span><span class=cF0> (tmpi->ic_flags&</span><span class=cF3>ICF_LOCK</span><span class=cF0>)
|
|
<a name="l482"></a> </span><span class=cFD>ICU8</span><span class=cF0>(tmpi,</span><span class=cF3>OC_LOCK_PREFIX</span><span class=cF0>);
|
|
<a name="l483"></a> </span><span class=cFD>ICRex</span><span class=cF0>(tmpi,i.u8[1]);
|
|
<a name="l484"></a> </span><span class=cFD>ICU16</span><span class=cF0>(tmpi,i.u8[2]<<8+op.u8[0]);
|
|
<a name="l485"></a> </span><span class=cFD>ICModr2</span><span class=cF0>(tmpi,i,,d3,rip);
|
|
<a name="l486"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi,t2&</span><span class=cF3>MDG_MASK</span><span class=cF0>+type_pointed_to,r2,d2,
|
|
<a name="l487"></a> </span><span class=cF3>MDF_REG</span><span class=cF0>+</span><span class=cF3>RT_I64</span><span class=cF0>,res_reg,0,rip);
|
|
<a name="l488"></a> done=</span><span class=cF3>TRUE</span><span class=cF0>;
|
|
<a name="l489"></a> }
|
|
<a name="l490"></a> </span><span class=cF7>}</span><span class=cF0>
|
|
<a name="l491"></a> </span><span class=cF1>if</span><span class=cF0> (!done) </span><span class=cF7>{</span><span class=cF0>
|
|
<a name="l492"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi,</span><span class=cF3>MDF_REG</span><span class=cF0>+</span><span class=cF3>RT_I64</span><span class=cF0>,</span><span class=cF3>REG_RAX</span><span class=cF0>,0,t3,r3,d3,rip);
|
|
<a name="l493"></a> </span><span class=cF1>if</span><span class=cF0> (t2&</span><span class=cF3>MDF_REG</span><span class=cF0> && r2!=</span><span class=cF3>REG_RAX</span><span class=cF0>)
|
|
<a name="l494"></a> res_reg=r2;
|
|
<a name="l495"></a> </span><span class=cF1>else</span><span class=cF0> {
|
|
<a name="l496"></a> res_reg=</span><span class=cF3>REG_RCX</span><span class=cF0>;
|
|
<a name="l497"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi,</span><span class=cF3>MDF_REG</span><span class=cF0>+</span><span class=cF3>RT_I64</span><span class=cF0>,</span><span class=cF3>REG_RCX</span><span class=cF0>,0,
|
|
<a name="l498"></a> t2&</span><span class=cF3>MDG_MASK</span><span class=cF0>+type_pointed_to,r2,d2,rip);
|
|
<a name="l499"></a> }
|
|
<a name="l500"></a> </span><span class=cF1>if</span><span class=cF0> (tmpi->ic_flags&</span><span class=cF3>ICF_LOCK</span><span class=cF0>)
|
|
<a name="l501"></a> </span><span class=cFD>ICU8</span><span class=cF0>(tmpi,</span><span class=cF3>OC_LOCK_PREFIX</span><span class=cF0>);
|
|
<a name="l502"></a> </span><span class=cF1>if</span><span class=cF0> (res_reg>7)
|
|
<a name="l503"></a> </span><span class=cFD>ICU8</span><span class=cF0>(tmpi,0x4C);
|
|
<a name="l504"></a> </span><span class=cF1>else</span><span class=cF0>
|
|
<a name="l505"></a> </span><span class=cFD>ICU8</span><span class=cF0>(tmpi,0x48);
|
|
<a name="l506"></a> </span><span class=cFD>ICU16</span><span class=cF0>(tmpi,0xC000+op.u8[0]+</span><span class=cF7>(</span><span class=cF0>res_reg&7</span><span class=cF7>)</span><span class=cF0><<11);
|
|
<a name="l507"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi,t2&</span><span class=cF3>MDG_MASK</span><span class=cF0>+type_pointed_to,r2,d2,
|
|
<a name="l508"></a> </span><span class=cF3>MDF_REG</span><span class=cF0>+</span><span class=cF3>RT_I64</span><span class=cF0>,res_reg,0,rip);
|
|
<a name="l509"></a> </span><span class=cF7>}</span><span class=cF0>
|
|
<a name="l510"></a> }
|
|
<a name="l511"></a> </span><span class=cF7>}</span><span class=cF0> </span><span class=cF1>else</span><span class=cF0> </span><span class=cF7>{</span><span class=cF0>
|
|
<a name="l512"></a> done=</span><span class=cF3>FALSE</span><span class=cF0>;
|
|
<a name="l513"></a> </span><span class=cF1>if</span><span class=cF0> (t3&</span><span class=cF3>MDF_IMM</span><span class=cF0> && op.u8[2]) {
|
|
<a name="l514"></a> </span><span class=cF1>if</span><span class=cF0> (!d3.u32[1]) </span><span class=cF7>{</span><span class=cF0>
|
|
<a name="l515"></a> </span><span class=cF1>if</span><span class=cF0> (tmpi->ic_flags&</span><span class=cF3>ICF_RES_NOT_USED</span><span class=cF0> &&
|
|
<a name="l516"></a> t2&</span><span class=cF3>MDF_REG</span><span class=cF0> && d3</span><span class=cF7>(</span><span class=cF9>U64</span><span class=cF7>)</span><span class=cF0><=</span><span class=cF3>I8_MAX</span><span class=cF0>) {
|
|
<a name="l517"></a> </span><span class=cFD>ICSlashOp</span><span class=cF0>(tmpi,</span><span class=cF3>MDF_DISP</span><span class=cF0>+type_pointed_to,r2,0,0x838000+op.u8[4],rip);
|
|
<a name="l518"></a> </span><span class=cFD>ICU8</span><span class=cF0>(tmpi,d3);
|
|
<a name="l519"></a> done=</span><span class=cF3>TRUE</span><span class=cF0>;
|
|
<a name="l520"></a> } </span><span class=cF1>else</span><span class=cF0> </span><span class=cF1>if</span><span class=cF0> (op.u8[2]==0x24) {</span><span class=cF2>//AND</span><span class=cF0>
|
|
<a name="l521"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi,</span><span class=cF3>MDF_REG</span><span class=cF0>+</span><span class=cF3>RT_I64</span><span class=cF0>,</span><span class=cF3>REG_RCX</span><span class=cF0>,0,t2,r2,d2,rip);
|
|
<a name="l522"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi,</span><span class=cF3>MDF_REG</span><span class=cF0>+</span><span class=cF3>RT_I64</span><span class=cF0>,</span><span class=cF3>REG_RAX</span><span class=cF0>,0,
|
|
<a name="l523"></a> </span><span class=cF3>MDF_DISP</span><span class=cF0>+type_pointed_to,</span><span class=cF3>REG_RCX</span><span class=cF0>,0,rip);
|
|
<a name="l524"></a> res_reg=</span><span class=cF3>REG_RAX</span><span class=cF0>;
|
|
<a name="l525"></a> </span><span class=cF1>if</span><span class=cF0> (tmpi->ic_flags&</span><span class=cF3>ICF_LOCK</span><span class=cF0>)
|
|
<a name="l526"></a> </span><span class=cFD>ICU8</span><span class=cF0>(tmpi,</span><span class=cF3>OC_LOCK_PREFIX</span><span class=cF0>);
|
|
<a name="l527"></a> </span><span class=cFD>ICU16</span><span class=cF0>(tmpi,op.u8[3]<<8+0x40);
|
|
<a name="l528"></a> </span><span class=cFD>ICU32</span><span class=cF0>(tmpi,d3);
|
|
<a name="l529"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi,</span><span class=cF3>MDF_DISP</span><span class=cF0>+type_pointed_to,</span><span class=cF3>REG_RCX</span><span class=cF0>,0,
|
|
<a name="l530"></a> </span><span class=cF3>MDF_REG</span><span class=cF0>+</span><span class=cF3>RT_I64</span><span class=cF0>,res_reg,0,rip);
|
|
<a name="l531"></a> done=</span><span class=cF3>TRUE</span><span class=cF0>;
|
|
<a name="l532"></a> } </span><span class=cF1>else</span><span class=cF0> </span><span class=cF1>if</span><span class=cF0> (type_pointed_to<</span><span class=cF3>RT_I64</span><span class=cF0>) {</span><span class=cF2>//OR/XOR</span><span class=cF0>
|
|
<a name="l533"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi,</span><span class=cF3>MDF_REG</span><span class=cF0>+</span><span class=cF3>RT_I64</span><span class=cF0>,</span><span class=cF3>REG_RCX</span><span class=cF0>,0,t2,r2,d2,rip);
|
|
<a name="l534"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi,</span><span class=cF3>MDF_REG</span><span class=cF0>+</span><span class=cF3>RT_I64</span><span class=cF0>,</span><span class=cF3>REG_RAX</span><span class=cF0>,0,
|
|
<a name="l535"></a> </span><span class=cF3>MDF_DISP</span><span class=cF0>+type_pointed_to,</span><span class=cF3>REG_RCX</span><span class=cF0>,0,rip);
|
|
<a name="l536"></a> res_reg=</span><span class=cF3>REG_RAX</span><span class=cF0>;
|
|
<a name="l537"></a> </span><span class=cF1>if</span><span class=cF0> (tmpi->ic_flags&</span><span class=cF3>ICF_LOCK</span><span class=cF0>)
|
|
<a name="l538"></a> </span><span class=cFD>ICU8</span><span class=cF0>(tmpi,</span><span class=cF3>OC_LOCK_PREFIX</span><span class=cF0>);
|
|
<a name="l539"></a> </span><span class=cF1>if</span><span class=cF0> (d3.u16[1]) </span><span class=cF7>{</span><span class=cF0>
|
|
<a name="l540"></a> </span><span class=cFD>ICU16</span><span class=cF0>(tmpi,op.u8[3]<<8+0x40);
|
|
<a name="l541"></a> </span><span class=cFD>ICU32</span><span class=cF0>(tmpi,d3);
|
|
<a name="l542"></a> </span><span class=cF7>}</span><span class=cF0> </span><span class=cF1>else</span><span class=cF0> </span><span class=cF1>if</span><span class=cF0> (d3.u8[1]) </span><span class=cF7>{</span><span class=cF0>
|
|
<a name="l543"></a> </span><span class=cFD>ICU24</span><span class=cF0>(tmpi,op.u8[3]<<16+0x4000+</span><span class=cF3>OC_OP_SIZE_PREFIX</span><span class=cF0>);
|
|
<a name="l544"></a> </span><span class=cFD>ICU16</span><span class=cF0>(tmpi,d3);
|
|
<a name="l545"></a> </span><span class=cF7>}</span><span class=cF0> </span><span class=cF1>else</span><span class=cF0> </span><span class=cF7>{</span><span class=cF0>
|
|
<a name="l546"></a> </span><span class=cFD>ICU16</span><span class=cF0>(tmpi,op.u8[2]<<8+0x40);
|
|
<a name="l547"></a> </span><span class=cFD>ICU8</span><span class=cF0>(tmpi,d3);
|
|
<a name="l548"></a> </span><span class=cF7>}</span><span class=cF0>
|
|
<a name="l549"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi,</span><span class=cF3>MDF_DISP</span><span class=cF0>+type_pointed_to,</span><span class=cF3>REG_RCX</span><span class=cF0>,0,
|
|
<a name="l550"></a> </span><span class=cF3>MDF_REG</span><span class=cF0>+</span><span class=cF3>RT_I64</span><span class=cF0>,res_reg,0,rip);
|
|
<a name="l551"></a> done=</span><span class=cF3>TRUE</span><span class=cF0>;
|
|
<a name="l552"></a> }
|
|
<a name="l553"></a> </span><span class=cF7>}</span><span class=cF0>
|
|
<a name="l554"></a> }
|
|
<a name="l555"></a> </span><span class=cF1>if</span><span class=cF0> (!done) {
|
|
<a name="l556"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi,</span><span class=cF3>MDF_REG</span><span class=cF0>+</span><span class=cF3>RT_I64</span><span class=cF0>,</span><span class=cF3>REG_RAX</span><span class=cF0>,0,t3,r3,d3,rip);
|
|
<a name="l557"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi,</span><span class=cF3>MDF_REG</span><span class=cF0>+</span><span class=cF3>RT_I64</span><span class=cF0>,</span><span class=cF3>REG_RCX</span><span class=cF0>,0,t2,r2,d2,rip);
|
|
<a name="l558"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi,</span><span class=cF3>MDF_REG</span><span class=cF0>+</span><span class=cF3>RT_I64</span><span class=cF0>,</span><span class=cF3>REG_RBX</span><span class=cF0>,0,
|
|
<a name="l559"></a> </span><span class=cF3>MDF_DISP</span><span class=cF0>+type_pointed_to,</span><span class=cF3>REG_RCX</span><span class=cF0>,0,rip);
|
|
<a name="l560"></a> res_reg=</span><span class=cF3>REG_RBX</span><span class=cF0>;
|
|
<a name="l561"></a> </span><span class=cF1>if</span><span class=cF0> (tmpi->ic_flags&</span><span class=cF3>ICF_LOCK</span><span class=cF0>)
|
|
<a name="l562"></a> </span><span class=cFD>ICU8</span><span class=cF0>(tmpi,</span><span class=cF3>OC_LOCK_PREFIX</span><span class=cF0>);
|
|
<a name="l563"></a> </span><span class=cFD>ICU8</span><span class=cF0>(tmpi,0x48);
|
|
<a name="l564"></a> </span><span class=cFD>ICU16</span><span class=cF0>(tmpi,0xC000+op.u8[0]+</span><span class=cF7>(</span><span class=cF0>res_reg&7</span><span class=cF7>)</span><span class=cF0><<11);
|
|
<a name="l565"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi,</span><span class=cF3>MDF_DISP</span><span class=cF0>+type_pointed_to,</span><span class=cF3>REG_RCX</span><span class=cF0>,0,
|
|
<a name="l566"></a> </span><span class=cF3>MDF_REG</span><span class=cF0>+</span><span class=cF3>RT_I64</span><span class=cF0>,res_reg,0,rip);
|
|
<a name="l567"></a> }
|
|
<a name="l568"></a> </span><span class=cF7>}</span><span class=cF0>
|
|
<a name="l569"></a> </span><span class=cF1>if</span><span class=cF0> (t1.mode)
|
|
<a name="l570"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi,t1,r1,d1,</span><span class=cF3>MDF_REG</span><span class=cF0>+</span><span class=cF3>RT_I64</span><span class=cF0>,res_reg,0,rip);
|
|
<a name="l571"></a>}
|
|
<a name="l572"></a>
|
|
<a name="l573"></a></span><span class=cF1>U0</span><span class=cF0> </span><span class=cFD>ICShift</span><span class=cF0>(</span><span class=cF9>CIntermediateCode</span><span class=cF0> *tmpi,</span><span class=cF9>CICType</span><span class=cF0> t1,</span><span class=cF9>I64</span><span class=cF0> r1,</span><span class=cF9>I64</span><span class=cF0> d1,
|
|
<a name="l574"></a> </span><span class=cF9>CICType</span><span class=cF0> t2,</span><span class=cF9>I64</span><span class=cF0> r2,</span><span class=cF9>I64</span><span class=cF0> d2,</span><span class=cF9>CICType</span><span class=cF0> t3,</span><span class=cF9>I64</span><span class=cF0> r3,</span><span class=cF9>I64</span><span class=cF0> d3,
|
|
<a name="l575"></a> </span><span class=cF9>I64</span><span class=cF0> us,</span><span class=cF9>I64</span><span class=cF0> is,</span><span class=cF9>I64</span><span class=cF0> rip)
|
|
<a name="l576"></a>{
|
|
<a name="l577"></a> </span><span class=cF9>I64</span><span class=cF0> i=0x48,res_reg;
|
|
<a name="l578"></a> </span><span class=cF1>if</span><span class=cF0> (tmpi->ic_class->raw_type&</span><span class=cF3>RTF_UNSIGNED</span><span class=cF0> ||
|
|
<a name="l579"></a> tmpi->ic_flags & </span><span class=cF3>ICF_USE_UNSIGNED</span><span class=cF0>)
|
|
<a name="l580"></a> is=us;
|
|
<a name="l581"></a> </span><span class=cF1>if</span><span class=cF0> (t1&</span><span class=cF3>MDF_REG</span><span class=cF0>) </span><span class=cF7>{</span><span class=cF0>
|
|
<a name="l582"></a> res_reg=r1;
|
|
<a name="l583"></a> </span><span class=cF1>if</span><span class=cF0> (res_reg>7)
|
|
<a name="l584"></a> i++;
|
|
<a name="l585"></a> </span><span class=cF7>}</span><span class=cF0> </span><span class=cF1>else</span><span class=cF0>
|
|
<a name="l586"></a> res_reg=</span><span class=cF3>REG_RAX</span><span class=cF0>;
|
|
<a name="l587"></a> </span><span class=cF1>if</span><span class=cF0> (t3&</span><span class=cF3>MDF_IMM</span><span class=cF0>) </span><span class=cF7>{</span><span class=cF0>
|
|
<a name="l588"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi,</span><span class=cF3>MDF_REG</span><span class=cF0>+</span><span class=cF3>RT_I64</span><span class=cF0>,res_reg,0,t2,r2,d2,rip);
|
|
<a name="l589"></a> </span><span class=cF1>if</span><span class=cF0> (d3==1)
|
|
<a name="l590"></a> </span><span class=cFD>ICU24</span><span class=cF0>(tmpi,i+is.u16[2]<<8+</span><span class=cF7>(</span><span class=cF0>res_reg&7</span><span class=cF7>)</span><span class=cF0><<16);
|
|
<a name="l591"></a> </span><span class=cF1>else</span><span class=cF0> {
|
|
<a name="l592"></a> </span><span class=cFD>ICU24</span><span class=cF0>(tmpi,i+is.u16[0]<<8+</span><span class=cF7>(</span><span class=cF0>res_reg&7</span><span class=cF7>)</span><span class=cF0><<16);
|
|
<a name="l593"></a> </span><span class=cFD>ICU8</span><span class=cF0>(tmpi,d3);
|
|
<a name="l594"></a> }
|
|
<a name="l595"></a> </span><span class=cF7>}</span><span class=cF0> </span><span class=cF1>else</span><span class=cF0> </span><span class=cF7>{</span><span class=cF0>
|
|
<a name="l596"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi,</span><span class=cF3>MDF_REG</span><span class=cF0>+</span><span class=cF3>RT_I64</span><span class=cF0>,</span><span class=cF3>REG_RCX</span><span class=cF0>,0,t3,r3,d3,rip);
|
|
<a name="l597"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi,</span><span class=cF3>MDF_REG</span><span class=cF0>+</span><span class=cF3>RT_I64</span><span class=cF0>,res_reg,0,t2,r2,d2,rip);
|
|
<a name="l598"></a> </span><span class=cFD>ICU24</span><span class=cF0>(tmpi,i+is.u16[1]<<8+</span><span class=cF7>(</span><span class=cF0>res_reg&7</span><span class=cF7>)</span><span class=cF0><<16);
|
|
<a name="l599"></a> </span><span class=cF7>}</span><span class=cF0>
|
|
<a name="l600"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi,t1,r1,d1,</span><span class=cF3>MDF_REG</span><span class=cF0>+</span><span class=cF3>RT_I64</span><span class=cF0>,res_reg,0,rip);
|
|
<a name="l601"></a>}
|
|
<a name="l602"></a>
|
|
<a name="l603"></a></span><span class=cF1>U0</span><span class=cF0> </span><span class=cFD>ICShiftEqu</span><span class=cF0>(</span><span class=cF9>CIntermediateCode</span><span class=cF0> *tmpi,</span><span class=cF1>U8</span><span class=cF0> type_pointed_to,
|
|
<a name="l604"></a> </span><span class=cF9>CICType</span><span class=cF0> t1,</span><span class=cF9>I64</span><span class=cF0> r1,</span><span class=cF9>I64</span><span class=cF0> d1,
|
|
<a name="l605"></a> </span><span class=cF9>CICType</span><span class=cF0> t2,</span><span class=cF9>I64</span><span class=cF0> r2,</span><span class=cF9>I64</span><span class=cF0> d2,
|
|
<a name="l606"></a> </span><span class=cF9>CICType</span><span class=cF0> t3,</span><span class=cF9>I64</span><span class=cF0> r3,</span><span class=cF9>I64</span><span class=cF0> d3,</span><span class=cF9>I64</span><span class=cF0> us,</span><span class=cF9>I64</span><span class=cF0> is,</span><span class=cF9>I64</span><span class=cF0> rip)
|
|
<a name="l607"></a>{
|
|
<a name="l608"></a> </span><span class=cF9>I64</span><span class=cF0> res_reg;
|
|
<a name="l609"></a> </span><span class=cF1>if</span><span class=cF0> (tmpi->ic_class->raw_type&</span><span class=cF3>RTF_UNSIGNED</span><span class=cF0> ||
|
|
<a name="l610"></a> tmpi->ic_flags & </span><span class=cF3>ICF_USE_UNSIGNED</span><span class=cF0>)
|
|
<a name="l611"></a> is=us;
|
|
<a name="l612"></a> </span><span class=cF1>if</span><span class=cF0> (tmpi->ic_flags & </span><span class=cF3>ICF_BY_VAL</span><span class=cF0>) </span><span class=cF7>{</span><span class=cF0>
|
|
<a name="l613"></a> </span><span class=cF1>if</span><span class=cF0> (!</span><span class=cF7>(</span><span class=cF0>t3&</span><span class=cF3>MDF_IMM</span><span class=cF7>)</span><span class=cF0>)
|
|
<a name="l614"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi,</span><span class=cF3>MDF_REG</span><span class=cF0>+</span><span class=cF3>RT_I64</span><span class=cF0>,</span><span class=cF3>REG_RCX</span><span class=cF0>,0,t3,r3,d3,rip);
|
|
<a name="l615"></a> </span><span class=cF1>if</span><span class=cF0> (t2&</span><span class=cF3>MDF_REG</span><span class=cF0>)
|
|
<a name="l616"></a> res_reg=r2;
|
|
<a name="l617"></a> </span><span class=cF1>else</span><span class=cF0> {
|
|
<a name="l618"></a> res_reg=</span><span class=cF3>REG_RAX</span><span class=cF0>;
|
|
<a name="l619"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi,</span><span class=cF3>MDF_REG</span><span class=cF0>+</span><span class=cF3>RT_I64</span><span class=cF0>,</span><span class=cF3>REG_RAX</span><span class=cF0>,0,
|
|
<a name="l620"></a> t2&</span><span class=cF3>MDG_MASK</span><span class=cF0>+type_pointed_to,r2,d2,rip);
|
|
<a name="l621"></a> }
|
|
<a name="l622"></a> </span><span class=cF1>if</span><span class=cF0> (res_reg>7)
|
|
<a name="l623"></a> </span><span class=cFD>ICU8</span><span class=cF0>(tmpi,0x49);
|
|
<a name="l624"></a> </span><span class=cF1>else</span><span class=cF0>
|
|
<a name="l625"></a> </span><span class=cFD>ICU8</span><span class=cF0>(tmpi,0x48);
|
|
<a name="l626"></a> </span><span class=cF1>if</span><span class=cF0> (t3&</span><span class=cF3>MDF_IMM</span><span class=cF0>) {
|
|
<a name="l627"></a> </span><span class=cF1>if</span><span class=cF0> (d3==1)
|
|
<a name="l628"></a> </span><span class=cFD>ICU16</span><span class=cF0>(tmpi,is.u16[2]+</span><span class=cF7>(</span><span class=cF0>res_reg&7</span><span class=cF7>)</span><span class=cF0><<8);
|
|
<a name="l629"></a> </span><span class=cF1>else</span><span class=cF0> </span><span class=cF7>{</span><span class=cF0>
|
|
<a name="l630"></a> </span><span class=cFD>ICU16</span><span class=cF0>(tmpi,is.u16[0]+</span><span class=cF7>(</span><span class=cF0>res_reg&7</span><span class=cF7>)</span><span class=cF0><<8);
|
|
<a name="l631"></a> </span><span class=cFD>ICU8</span><span class=cF0>(tmpi,d3);
|
|
<a name="l632"></a> </span><span class=cF7>}</span><span class=cF0>
|
|
<a name="l633"></a> } </span><span class=cF1>else</span><span class=cF0>
|
|
<a name="l634"></a> </span><span class=cFD>ICU16</span><span class=cF0>(tmpi,is.u16[1]+</span><span class=cF7>(</span><span class=cF0>res_reg&7</span><span class=cF7>)</span><span class=cF0><<8);
|
|
<a name="l635"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi,t2&</span><span class=cF3>MDG_MASK</span><span class=cF0>+type_pointed_to,r2,d2,
|
|
<a name="l636"></a> </span><span class=cF3>MDF_REG</span><span class=cF0>+</span><span class=cF3>RT_I64</span><span class=cF0>,res_reg,0,rip);
|
|
<a name="l637"></a> </span><span class=cF7>}</span><span class=cF0> </span><span class=cF1>else</span><span class=cF0> </span><span class=cF7>{</span><span class=cF0>
|
|
<a name="l638"></a> </span><span class=cF1>if</span><span class=cF0> (!</span><span class=cF7>(</span><span class=cF0>t3&</span><span class=cF3>MDF_IMM</span><span class=cF7>)</span><span class=cF0>)
|
|
<a name="l639"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi,</span><span class=cF3>MDF_REG</span><span class=cF0>+</span><span class=cF3>RT_I64</span><span class=cF0>,</span><span class=cF3>REG_RCX</span><span class=cF0>,0,t3,r3,d3,rip);
|
|
<a name="l640"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi,</span><span class=cF3>MDF_REG</span><span class=cF0>+</span><span class=cF3>RT_I64</span><span class=cF0>,</span><span class=cF3>REG_RDX</span><span class=cF0>,0,t2,r2,d2,rip);
|
|
<a name="l641"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi,</span><span class=cF3>MDF_REG</span><span class=cF0>+</span><span class=cF3>RT_I64</span><span class=cF0>,</span><span class=cF3>REG_RAX</span><span class=cF0>,0,</span><span class=cF3>MDF_DISP</span><span class=cF0>+type_pointed_to,</span><span class=cF3>REG_RDX</span><span class=cF0>,0,rip);
|
|
<a name="l642"></a> res_reg=</span><span class=cF3>REG_RAX</span><span class=cF0>;
|
|
<a name="l643"></a> </span><span class=cFD>ICU8</span><span class=cF0>(tmpi,0x48);
|
|
<a name="l644"></a> </span><span class=cF1>if</span><span class=cF0> (t3&</span><span class=cF3>MDF_IMM</span><span class=cF0>) {
|
|
<a name="l645"></a> </span><span class=cF1>if</span><span class=cF0> (d3==1)
|
|
<a name="l646"></a> </span><span class=cFD>ICU16</span><span class=cF0>(tmpi,is.u16[2]+</span><span class=cF7>(</span><span class=cF0>res_reg&7</span><span class=cF7>)</span><span class=cF0><<8);
|
|
<a name="l647"></a> </span><span class=cF1>else</span><span class=cF0> </span><span class=cF7>{</span><span class=cF0>
|
|
<a name="l648"></a> </span><span class=cFD>ICU16</span><span class=cF0>(tmpi,is.u16[0]+</span><span class=cF7>(</span><span class=cF0>res_reg&7</span><span class=cF7>)</span><span class=cF0><<8);
|
|
<a name="l649"></a> </span><span class=cFD>ICU8</span><span class=cF0>(tmpi,d3);
|
|
<a name="l650"></a> </span><span class=cF7>}</span><span class=cF0>
|
|
<a name="l651"></a> } </span><span class=cF1>else</span><span class=cF0>
|
|
<a name="l652"></a> </span><span class=cFD>ICU16</span><span class=cF0>(tmpi,is.u16[1]+</span><span class=cF7>(</span><span class=cF0>res_reg&7</span><span class=cF7>)</span><span class=cF0><<8);
|
|
<a name="l653"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi,
|
|
<a name="l654"></a> </span><span class=cF3>MDF_DISP</span><span class=cF0>+type_pointed_to,</span><span class=cF3>REG_RDX</span><span class=cF0>,0,</span><span class=cF3>MDF_REG</span><span class=cF0>+</span><span class=cF3>RT_I64</span><span class=cF0>,res_reg,0,rip);
|
|
<a name="l655"></a> </span><span class=cF7>}</span><span class=cF0>
|
|
<a name="l656"></a> </span><span class=cF1>if</span><span class=cF0> (t1.mode)
|
|
<a name="l657"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi,t1,r1,d1,</span><span class=cF3>MDF_REG</span><span class=cF0>+</span><span class=cF3>RT_I64</span><span class=cF0>,res_reg,0,rip);
|
|
<a name="l658"></a>}
|
|
</span></pre></body>
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</html>
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