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<a name="l1"></a><span class=cF2>/*Intermediate Code to Machine Code</span><span class=cF0>
<a name="l2"></a>
<a name="l3"></a></span><span class=cF2>RAX,RBX,RCX and RDX can be clobbered by</span><span class=cF0>
<a name="l4"></a></span><span class=cF2>each intermediate code's output code.</span><span class=cF0>
<a name="l5"></a></span><span class=cF2>However, intermediate codes must be</span><span class=cF0>
<a name="l6"></a></span><span class=cF2>coupled together based on the arg and</span><span class=cF0>
<a name="l7"></a></span><span class=cF2>res type specifications in the</span><span class=cF4>
<a name="l8"></a></span><a href="/Wb/Kernel/KernelA.HH.HTML#l1643"><span class=cF4>CICArg</span></a><span class=cF2>. RAX is the most common reg</span><span class=cF0>
<a name="l9"></a></span><span class=cF2>for coupling intermediate codes.</span><span class=cF0>
<a name="l10"></a>
<a name="l11"></a></span><span class=cF2>Internal calculations take place on</span><span class=cF0>
<a name="l12"></a></span><span class=cF2>64-bit vals, so anything which has</span><span class=cF0>
<a name="l13"></a></span><span class=cF2>found it's way into a reg has been</span><span class=cF0>
<a name="l14"></a></span><span class=cF2>sign or zero extended to 64-bits.</span><span class=cF0>
<a name="l15"></a></span><span class=cF2>*/</span><span class=cF0>
<a name="l16"></a>
<a name="l17"></a></span><span class=cF1>U0</span><span class=cF0> </span><span class=cFD>ICU8</span><span class=cF0>(</span><span class=cF9>CIntermediateCode</span><span class=cF0> *tmpi,</span><span class=cF1>U8</span><span class=cF0> b)
<a name="l18"></a>{
<a name="l19"></a> tmpi-&gt;ic_body[tmpi-&gt;ic_cnt++]=b;
<a name="l20"></a>}
<a name="l21"></a>
<a name="l22"></a></span><span class=cF1>U0</span><span class=cF0> </span><span class=cFD>ICRex</span><span class=cF0>(</span><span class=cF9>CIntermediateCode</span><span class=cF0> *tmpi,</span><span class=cF1>U8</span><span class=cF0> b)
<a name="l23"></a>{
<a name="l24"></a> </span><span class=cF1>if</span><span class=cF0> (b)
<a name="l25"></a> tmpi-&gt;ic_body[tmpi-&gt;ic_cnt++]=b;
<a name="l26"></a>}
<a name="l27"></a>
<a name="l28"></a></span><span class=cF1>U0</span><span class=cF0> </span><span class=cFD>ICOpSizeRex</span><span class=cF0>(</span><span class=cF9>CIntermediateCode</span><span class=cF0> *tmpi,</span><span class=cF1>U8</span><span class=cF0> b)
<a name="l29"></a>{
<a name="l30"></a> tmpi-&gt;ic_body[tmpi-&gt;ic_cnt++]=</span><span class=cF3>OC_OP_SIZE_PREFIX</span><span class=cF0>;
<a name="l31"></a> </span><span class=cF1>if</span><span class=cF0> (b)
<a name="l32"></a> tmpi-&gt;ic_body[tmpi-&gt;ic_cnt++]=b;
<a name="l33"></a>}
<a name="l34"></a>
<a name="l35"></a></span><span class=cF1>U0</span><span class=cF0> </span><span class=cFD>ICU16</span><span class=cF0>(</span><span class=cF9>CIntermediateCode</span><span class=cF0> *tmpi,</span><span class=cF9>U16</span><span class=cF0> w)
<a name="l36"></a>{
<a name="l37"></a> *(&amp;tmpi-&gt;ic_body[tmpi-&gt;ic_cnt])(</span><span class=cF9>U16</span><span class=cF0>)=w;
<a name="l38"></a> tmpi-&gt;ic_cnt+=2;
<a name="l39"></a>}
<a name="l40"></a>
<a name="l41"></a></span><span class=cF1>U0</span><span class=cF0> </span><span class=cFD>ICU24</span><span class=cF0>(</span><span class=cF9>CIntermediateCode</span><span class=cF0> *tmpi,</span><span class=cF9>U32</span><span class=cF0> d)
<a name="l42"></a>{</span><span class=cF2>//Writes extra harmless overhanging byte.</span><span class=cF0>
<a name="l43"></a> *(&amp;tmpi-&gt;ic_body[tmpi-&gt;ic_cnt])(</span><span class=cF9>U32</span><span class=cF0>)=d;
<a name="l44"></a> tmpi-&gt;ic_cnt+=3;
<a name="l45"></a>}
<a name="l46"></a>
<a name="l47"></a></span><span class=cF1>U0</span><span class=cF0> </span><span class=cFD>ICU32</span><span class=cF0>(</span><span class=cF9>CIntermediateCode</span><span class=cF0> *tmpi,</span><span class=cF9>U32</span><span class=cF0> d)
<a name="l48"></a>{
<a name="l49"></a> *(&amp;tmpi-&gt;ic_body[tmpi-&gt;ic_cnt])(</span><span class=cF9>U32</span><span class=cF0>)=d;
<a name="l50"></a> tmpi-&gt;ic_cnt+=4;
<a name="l51"></a>}
<a name="l52"></a>
<a name="l53"></a></span><span class=cF1>U0</span><span class=cF0> </span><span class=cFD>ICU64</span><span class=cF0>(</span><span class=cF9>CIntermediateCode</span><span class=cF0> *tmpi,</span><span class=cF9>U64</span><span class=cF0> q)
<a name="l54"></a>{
<a name="l55"></a> *(&amp;tmpi-&gt;ic_body[tmpi-&gt;ic_cnt])(</span><span class=cF9>U64</span><span class=cF0>)=q;
<a name="l56"></a> tmpi-&gt;ic_cnt+=8;
<a name="l57"></a>}
<a name="l58"></a>
<a name="l59"></a></span><span class=cF1>U0</span><span class=cF0> </span><span class=cFD>ICAddRSP</span><span class=cF0>(</span><span class=cF9>CIntermediateCode</span><span class=cF0> *tmpi,</span><span class=cF9>I64</span><span class=cF0> i,</span><span class=cF1>Bool</span><span class=cF0> optimize=</span><span class=cF3>TRUE</span><span class=cF0>)
<a name="l60"></a>{
<a name="l61"></a> </span><span class=cF9>I64</span><span class=cF0> j,last_start;
<a name="l62"></a> </span><span class=cF9>CIntermediateCode</span><span class=cF0> *tmpil1;
<a name="l63"></a> </span><span class=cF1>if</span><span class=cF0> (optimize) </span><span class=cF7>{</span><span class=cF0>
<a name="l64"></a> tmpil1=tmpi;
<a name="l65"></a> </span><span class=cF1>if</span><span class=cF0> (tmpi-&gt;ic_last_start&lt;0 &amp;&amp; !tmpi-&gt;ic_cnt &amp;&amp;
<a name="l66"></a> </span><span class=cF7>(</span><span class=cF0>tmpil1=</span><span class=cFD>OptLag1</span><span class=cF0>(tmpi)</span><span class=cF7>)</span><span class=cF0> &amp;&amp; tmpil1-&gt;ic_last_start&lt;0)
<a name="l67"></a> tmpil1=</span><span class=cF3>NULL</span><span class=cF0>;
<a name="l68"></a> </span><span class=cF1>if</span><span class=cF0> (tmpil1) {
<a name="l69"></a> j=tmpil1-&gt;ic_cnt;
<a name="l70"></a> </span><span class=cF1>if</span><span class=cF0> (tmpil1-&gt;ic_last_start==j-4 &amp;&amp; tmpil1-&gt;ic_body[j-3]==0x83 &amp;&amp;
<a name="l71"></a> tmpil1-&gt;ic_body[j-4]==0x48) </span><span class=cF7>{</span><span class=cF0>
<a name="l72"></a> </span><span class=cF1>if</span><span class=cF0> (tmpil1-&gt;ic_body[j-2]==0xEC)
<a name="l73"></a> j=-tmpil1-&gt;ic_body[j-1](</span><span class=cF1>I8</span><span class=cF0>);
<a name="l74"></a> </span><span class=cF1>else</span><span class=cF0> </span><span class=cF1>if</span><span class=cF0> (tmpil1-&gt;ic_body[j-2]==0xC4)
<a name="l75"></a> j=tmpil1-&gt;ic_body[j-1](</span><span class=cF1>I8</span><span class=cF0>);
<a name="l76"></a> </span><span class=cF1>else</span><span class=cF0>
<a name="l77"></a> j=0;
<a name="l78"></a> </span><span class=cF7>}</span><span class=cF0> </span><span class=cF1>else</span><span class=cF0> </span><span class=cF1>if</span><span class=cF0> (tmpil1-&gt;ic_last_start==j-7 &amp;&amp; tmpil1-&gt;ic_body[j-6]==0x81 &amp;&amp;
<a name="l79"></a> tmpil1-&gt;ic_body[j-7]==0x48) </span><span class=cF7>{</span><span class=cF0>
<a name="l80"></a> </span><span class=cF1>if</span><span class=cF0> (tmpil1-&gt;ic_body[j-5]==0xEC)
<a name="l81"></a> j=-tmpil1-&gt;ic_body[j-4](</span><span class=cF9>I32</span><span class=cF0>);
<a name="l82"></a> </span><span class=cF1>else</span><span class=cF0> </span><span class=cF1>if</span><span class=cF0> (tmpil1-&gt;ic_body[j-5]==0xC4)
<a name="l83"></a> j=tmpil1-&gt;ic_body[j-4](</span><span class=cF9>I32</span><span class=cF0>);
<a name="l84"></a> </span><span class=cF1>else</span><span class=cF0>
<a name="l85"></a> j=0;
<a name="l86"></a> </span><span class=cF7>}</span><span class=cF0> </span><span class=cF1>else</span><span class=cF0>
<a name="l87"></a> j=0;
<a name="l88"></a> </span><span class=cF1>if</span><span class=cF0> (j) </span><span class=cF7>{</span><span class=cF0>
<a name="l89"></a> </span><span class=cF1>if</span><span class=cF0> (tmpi==tmpil1) {
<a name="l90"></a> tmpi-&gt;ic_cnt=tmpi-&gt;ic_last_start;
<a name="l91"></a> i+=j;
<a name="l92"></a> } </span><span class=cF1>else</span><span class=cF0> </span><span class=cF1>if</span><span class=cF0> (!</span><span class=cF7>(</span><span class=cF0>tmpi-&gt;ic_flags&amp;</span><span class=cF3>ICF_PREV_DELETED</span><span class=cF7>)</span><span class=cF0>) {
<a name="l93"></a> tmpil1-&gt;ic_flags|=</span><span class=cF3>ICF_DEL_PREV_INS</span><span class=cF0>;
<a name="l94"></a> tmpi-&gt;ic_flags=tmpi-&gt;ic_flags&amp;~</span><span class=cF3>ICF_CODE_FINAL</span><span class=cF0>|</span><span class=cF3>ICF_PREV_DELETED</span><span class=cF0>;
<a name="l95"></a> i+=j;
<a name="l96"></a> }
<a name="l97"></a> </span><span class=cF7>}</span><span class=cF0>
<a name="l98"></a> }
<a name="l99"></a> </span><span class=cF7>}</span><span class=cF0>
<a name="l100"></a> last_start=tmpi-&gt;ic_cnt;
<a name="l101"></a> </span><span class=cF1>if</span><span class=cF0> (i&gt;0) </span><span class=cF7>{</span><span class=cF0>
<a name="l102"></a> </span><span class=cF1>if</span><span class=cF0> (i&lt;=</span><span class=cF3>I8_MAX</span><span class=cF0>)
<a name="l103"></a> </span><span class=cFD>ICU32</span><span class=cF0>(tmpi,0xC48348+i&lt;&lt;24);
<a name="l104"></a> </span><span class=cF1>else</span><span class=cF0> </span><span class=cF1>if</span><span class=cF0> (i&lt;=</span><span class=cF3>I32_MAX</span><span class=cF0>) {
<a name="l105"></a> </span><span class=cFD>ICU24</span><span class=cF0>(tmpi,0xC48148);
<a name="l106"></a> </span><span class=cFD>ICU32</span><span class=cF0>(tmpi,i);
<a name="l107"></a> } </span><span class=cF1>else</span><span class=cF0>
<a name="l108"></a> </span><span class=cF5>throw</span><span class=cF0>(</span><span class=cF6>'Compiler'</span><span class=cF0>);
<a name="l109"></a> </span><span class=cF7>}</span><span class=cF0> </span><span class=cF1>else</span><span class=cF0> </span><span class=cF1>if</span><span class=cF0> (i&lt;0) </span><span class=cF7>{</span><span class=cF0>
<a name="l110"></a> i=-i;
<a name="l111"></a> </span><span class=cF1>if</span><span class=cF0> (i&lt;=</span><span class=cF3>I8_MAX</span><span class=cF0>)
<a name="l112"></a> </span><span class=cFD>ICU32</span><span class=cF0>(tmpi,0xEC8348+i&lt;&lt;24);
<a name="l113"></a> </span><span class=cF1>else</span><span class=cF0> </span><span class=cF1>if</span><span class=cF0> (i&lt;=</span><span class=cF3>I32_MAX</span><span class=cF0>) {
<a name="l114"></a> </span><span class=cFD>ICU24</span><span class=cF0>(tmpi,0xEC8148);
<a name="l115"></a> </span><span class=cFD>ICU32</span><span class=cF0>(tmpi,i);
<a name="l116"></a> } </span><span class=cF1>else</span><span class=cF0>
<a name="l117"></a> </span><span class=cF5>throw</span><span class=cF0>(</span><span class=cF6>'Compiler'</span><span class=cF0>);
<a name="l118"></a> </span><span class=cF7>}</span><span class=cF0>
<a name="l119"></a> </span><span class=cF1>if</span><span class=cF0> (optimize &amp;&amp; tmpi-&gt;ic_cnt&gt;last_start)
<a name="l120"></a> tmpi-&gt;ic_last_start=last_start;
<a name="l121"></a>}
<a name="l122"></a>
<a name="l123"></a></span><span class=cF1>extern</span><span class=cF0> </span><span class=cF1>U0</span><span class=cF0> </span><span class=cFD>ICMov</span><span class=cF0>(</span><span class=cF9>CIntermediateCode</span><span class=cF0> *tmpi,
<a name="l124"></a> </span><span class=cF9>CICType</span><span class=cF0> t1,</span><span class=cF9>I64</span><span class=cF0> r1,</span><span class=cF9>I64</span><span class=cF0> d1,</span><span class=cF9>CICType</span><span class=cF0> t2,</span><span class=cF9>I64</span><span class=cF0> r2,</span><span class=cF9>I64</span><span class=cF0> d2,</span><span class=cF9>I64</span><span class=cF0> rip);
<a name="l125"></a>
<a name="l126"></a>#</span><span class=cF1>define</span><span class=cF0> MODR_REG 0
<a name="l127"></a>#</span><span class=cF1>define</span><span class=cF0> MODR_INDIRECT_REG 1
<a name="l128"></a>#</span><span class=cF1>define</span><span class=cF0> MODR_D8_INDIRECT_REG 2
<a name="l129"></a>#</span><span class=cF1>define</span><span class=cF0> MODR_D32_INDIRECT_REG 3
<a name="l130"></a>#</span><span class=cF1>define</span><span class=cF0> MODR_SIB_INDIRECT_REG 4
<a name="l131"></a>#</span><span class=cF1>define</span><span class=cF0> MODR_SIB_D8_INDIRECT_REG 5
<a name="l132"></a>#</span><span class=cF1>define</span><span class=cF0> MODR_SIB_D32_INDIRECT_REG 6
<a name="l133"></a>#</span><span class=cF1>define</span><span class=cF0> MODR_RIP_REL 7
<a name="l134"></a>#</span><span class=cF1>define</span><span class=cF0> MODR_RIP_REL_IMM_U32 8
<a name="l135"></a>
<a name="l136"></a></span><span class=cF9>I64</span><span class=cF0> </span><span class=cFD>ICModr1</span><span class=cF0>(</span><span class=cF9>I64</span><span class=cF0> r,</span><span class=cF9>CICType</span><span class=cF0> t2,</span><span class=cF9>I64</span><span class=cF0> r2,</span><span class=cF9>I64</span><span class=cF0> d2)
<a name="l137"></a>{</span><span class=cF2>//res.u8[0] is type</span><span class=cF0>
<a name="l138"></a></span><span class=cF2>//res.u8[1] is REX</span><span class=cF0>
<a name="l139"></a> </span><span class=cF2>//res.u8[2] is ModR</span><span class=cF0>
<a name="l140"></a> </span><span class=cF2>//res.u8[3] is SIB</span><span class=cF0>
<a name="l141"></a> </span><span class=cF9>I64</span><span class=cF0> res=0;
<a name="l142"></a> </span><span class=cF1>if</span><span class=cF0> (t2.raw_type&lt;</span><span class=cF3>RT_I64</span><span class=cF0>)
<a name="l143"></a> res.u8[1]=0x40;
<a name="l144"></a> </span><span class=cF1>else</span><span class=cF0>
<a name="l145"></a> res.u8[1]=0x48;
<a name="l146"></a> </span><span class=cF1>if</span><span class=cF0> (r&gt;7) </span><span class=cF7>{</span><span class=cF0>
<a name="l147"></a> res.u8[1]+=4;
<a name="l148"></a> r&amp;=7;
<a name="l149"></a> </span><span class=cF7>}</span><span class=cF0>
<a name="l150"></a> </span><span class=cF1>switch</span><span class=cF0> (</span><span class=cF5>Bsr</span><span class=cF7>(</span><span class=cF0>t2</span><span class=cF7>)</span><span class=cF0>) </span><span class=cF7>{</span><span class=cF0>
<a name="l151"></a> </span><span class=cF1>case</span><span class=cF0> </span><span class=cF3>MDf_REG</span><span class=cF0>:
<a name="l152"></a> </span><span class=cF1>if</span><span class=cF0> (r2&gt;7) {
<a name="l153"></a> res.u8[1]++;
<a name="l154"></a> r2&amp;=7;
<a name="l155"></a> }
<a name="l156"></a> res.u8[2]=0xC0+r&lt;&lt;3+r2;
<a name="l157"></a> res.u8[0]=MODR_REG;
<a name="l158"></a> </span><span class=cF1>if</span><span class=cF0> (res.u8[1]==0x40 &amp;&amp; </span><span class=cF7>(</span><span class=cF0>t2.raw_type&gt;=</span><span class=cF3>RT_I16</span><span class=cF0> || r&lt;4 &amp;&amp; r2&lt;4</span><span class=cF7>)</span><span class=cF0>)
<a name="l159"></a> res.u8[1]=0;
<a name="l160"></a> </span><span class=cF1>break</span><span class=cF0>;
<a name="l161"></a> </span><span class=cF1>case</span><span class=cF0> </span><span class=cF3>MDf_DISP</span><span class=cF0>:
<a name="l162"></a> </span><span class=cF1>if</span><span class=cF0> (r2&gt;7) {
<a name="l163"></a> res.u8[1]++;
<a name="l164"></a> r2&amp;=7;
<a name="l165"></a> }
<a name="l166"></a> </span><span class=cF1>if</span><span class=cF0> (!d2 &amp;&amp; r2!=</span><span class=cF3>REG_RBP</span><span class=cF0>) {
<a name="l167"></a> res.u8[2]=r&lt;&lt;3+r2;
<a name="l168"></a> res.u8[0]=MODR_INDIRECT_REG;
<a name="l169"></a> } </span><span class=cF1>else</span><span class=cF0> </span><span class=cF1>if</span><span class=cF0> (</span><span class=cF3>I8_MIN</span><span class=cF0>&lt;=d2&lt;=</span><span class=cF3>I8_MAX</span><span class=cF0>) {
<a name="l170"></a> res.u8[2]=0x40+r&lt;&lt;3+r2;
<a name="l171"></a> res.u8[0]=MODR_D8_INDIRECT_REG;
<a name="l172"></a> } </span><span class=cF1>else</span><span class=cF0> {
<a name="l173"></a> res.u8[2]=0x80+r&lt;&lt;3+r2;
<a name="l174"></a> res.u8[0]=MODR_D32_INDIRECT_REG;
<a name="l175"></a> }
<a name="l176"></a> </span><span class=cF1>if</span><span class=cF0> (res.u8[1]==0x40 &amp;&amp; </span><span class=cF7>(</span><span class=cF0>t2.raw_type&gt;=</span><span class=cF3>RT_I16</span><span class=cF0> || r&lt;4</span><span class=cF7>)</span><span class=cF0>)
<a name="l177"></a> res.u8[1]=0;
<a name="l178"></a> </span><span class=cF1>break</span><span class=cF0>;
<a name="l179"></a> </span><span class=cF1>case</span><span class=cF0> </span><span class=cF3>MDf_SIB</span><span class=cF0>:
<a name="l180"></a> </span><span class=cF1>if</span><span class=cF0> (7&lt;r2.u8[0]&lt;</span><span class=cF3>REG_NONE</span><span class=cF0>)
<a name="l181"></a> res.u8[1]++;
<a name="l182"></a> </span><span class=cF1>if</span><span class=cF0> (r2.u8[1]&amp;15&gt;7)
<a name="l183"></a> res.u8[1]+=2;
<a name="l184"></a> </span><span class=cF1>if</span><span class=cF0> (r2.u8[0]==</span><span class=cF3>REG_NONE</span><span class=cF0>) {
<a name="l185"></a> res.u8[3]=5+(r2.u8[1]&amp;7)&lt;&lt;3+r2.u8[1]&amp;0xC0;
<a name="l186"></a> res.u8[2]=4+r&lt;&lt;3;
<a name="l187"></a> res.u8[0]=MODR_SIB_D32_INDIRECT_REG;
<a name="l188"></a> } </span><span class=cF1>else</span><span class=cF0> {
<a name="l189"></a> res.u8[3]=r2.u8[0]&amp;7+(r2.u8[1]&amp;7)&lt;&lt;3+r2.u8[1]&amp;0xC0;
<a name="l190"></a> </span><span class=cF1>if</span><span class=cF0> (!d2 &amp;&amp; r2.u8[0]&amp;7!=</span><span class=cF3>REG_RBP</span><span class=cF0>) </span><span class=cF7>{</span><span class=cF0>
<a name="l191"></a> res.u8[2]=4+r&lt;&lt;3;
<a name="l192"></a> res.u8[0]=MODR_SIB_INDIRECT_REG;
<a name="l193"></a> </span><span class=cF7>}</span><span class=cF0> </span><span class=cF1>else</span><span class=cF0> </span><span class=cF1>if</span><span class=cF0> (</span><span class=cF3>I8_MIN</span><span class=cF0>&lt;=d2&lt;=</span><span class=cF3>I8_MAX</span><span class=cF0>) </span><span class=cF7>{</span><span class=cF0>
<a name="l194"></a> res.u8[2]=0x44+r&lt;&lt;3;
<a name="l195"></a> res.u8[0]=MODR_SIB_D8_INDIRECT_REG;
<a name="l196"></a> </span><span class=cF7>}</span><span class=cF0> </span><span class=cF1>else</span><span class=cF0> </span><span class=cF7>{</span><span class=cF0>
<a name="l197"></a> res.u8[2]=0x84+r&lt;&lt;3;
<a name="l198"></a> res.u8[0]=MODR_SIB_D32_INDIRECT_REG;
<a name="l199"></a> </span><span class=cF7>}</span><span class=cF0>
<a name="l200"></a> }
<a name="l201"></a> </span><span class=cF1>if</span><span class=cF0> (res.u8[1]==0x40 &amp;&amp; </span><span class=cF7>(</span><span class=cF0>t2.raw_type&gt;=</span><span class=cF3>RT_I16</span><span class=cF0> || r&lt;4</span><span class=cF7>)</span><span class=cF0>)
<a name="l202"></a> res.u8[1]=0;
<a name="l203"></a> </span><span class=cF1>break</span><span class=cF0>;
<a name="l204"></a> </span><span class=cF1>case</span><span class=cF0> </span><span class=cF3>MDf_RIP_DISP32</span><span class=cF0>:
<a name="l205"></a> res.u8[2]=0x05+r&lt;&lt;3;
<a name="l206"></a> res.u8[0]=MODR_RIP_REL;
<a name="l207"></a> </span><span class=cF1>if</span><span class=cF0> (res.u8[1]==0x40 &amp;&amp; </span><span class=cF7>(</span><span class=cF0>t2.raw_type&gt;=</span><span class=cF3>RT_I16</span><span class=cF0> || r&lt;4</span><span class=cF7>)</span><span class=cF0>)
<a name="l208"></a> res.u8[1]=0;
<a name="l209"></a> </span><span class=cF1>break</span><span class=cF0>;
<a name="l210"></a> </span><span class=cF7>}</span><span class=cF0>
<a name="l211"></a> </span><span class=cF1>return</span><span class=cF0> res;
<a name="l212"></a>}
<a name="l213"></a>
<a name="l214"></a></span><span class=cF1>U0</span><span class=cF0> </span><span class=cFD>ICModr2</span><span class=cF0>(</span><span class=cF9>CIntermediateCode</span><span class=cF0> *tmpi,</span><span class=cF9>I64</span><span class=cF0> i,</span><span class=cF9>CICType</span><span class=cF0> t=0,</span><span class=cF9>I64</span><span class=cF0> d,</span><span class=cF9>I64</span><span class=cF0> rip=0)
<a name="l215"></a>{
<a name="l216"></a> </span><span class=cF1>switch</span><span class=cF0> [i.u8[0]] </span><span class=cF7>{</span><span class=cF0>
<a name="l217"></a> </span><span class=cF1>case</span><span class=cF0> MODR_REG:
<a name="l218"></a> </span><span class=cF1>break</span><span class=cF0>;
<a name="l219"></a> </span><span class=cF1>case</span><span class=cF0> MODR_INDIRECT_REG:
<a name="l220"></a> </span><span class=cF1>break</span><span class=cF0>;
<a name="l221"></a> </span><span class=cF1>case</span><span class=cF0> MODR_D8_INDIRECT_REG:
<a name="l222"></a> </span><span class=cFD>ICU8</span><span class=cF0>(tmpi,d);
<a name="l223"></a> </span><span class=cF1>break</span><span class=cF0>;
<a name="l224"></a> </span><span class=cF1>case</span><span class=cF0> MODR_D32_INDIRECT_REG:
<a name="l225"></a> </span><span class=cFD>ICU32</span><span class=cF0>(tmpi,d);
<a name="l226"></a> </span><span class=cF1>break</span><span class=cF0>;
<a name="l227"></a> </span><span class=cF1>case</span><span class=cF0> MODR_SIB_INDIRECT_REG:
<a name="l228"></a> </span><span class=cFD>ICU8</span><span class=cF0>(tmpi,i.u8[3]);
<a name="l229"></a> </span><span class=cF1>break</span><span class=cF0>;
<a name="l230"></a> </span><span class=cF1>case</span><span class=cF0> MODR_SIB_D8_INDIRECT_REG:
<a name="l231"></a> </span><span class=cFD>ICU8</span><span class=cF0>(tmpi,i.u8[3]);
<a name="l232"></a> </span><span class=cFD>ICU8</span><span class=cF0>(tmpi,d);
<a name="l233"></a> </span><span class=cF1>break</span><span class=cF0>;
<a name="l234"></a> </span><span class=cF1>case</span><span class=cF0> MODR_SIB_D32_INDIRECT_REG:
<a name="l235"></a> </span><span class=cFD>ICU8</span><span class=cF0>(tmpi,i.u8[3]);
<a name="l236"></a> </span><span class=cFD>ICU32</span><span class=cF0>(tmpi,d);
<a name="l237"></a> </span><span class=cF1>break</span><span class=cF0>;
<a name="l238"></a> </span><span class=cF1>case</span><span class=cF0> MODR_RIP_REL_IMM_U32:
<a name="l239"></a> </span><span class=cF1>switch</span><span class=cF0> (t.raw_type) {
<a name="l240"></a> </span><span class=cF1>case</span><span class=cF0> </span><span class=cF3>RT_I8</span><span class=cF0>:
<a name="l241"></a> </span><span class=cF1>case</span><span class=cF0> </span><span class=cF3>RT_U8</span><span class=cF0>:
<a name="l242"></a> d--;
<a name="l243"></a> </span><span class=cF1>break</span><span class=cF0>;
<a name="l244"></a> </span><span class=cF1>case</span><span class=cF0> </span><span class=cF3>RT_I16</span><span class=cF0>:
<a name="l245"></a> </span><span class=cF1>case</span><span class=cF0> </span><span class=cF3>RT_U16</span><span class=cF0>:
<a name="l246"></a> d-=2;
<a name="l247"></a> </span><span class=cF1>break</span><span class=cF0>;
<a name="l248"></a> </span><span class=cF1>default</span><span class=cF0>:
<a name="l249"></a> d-=4;
<a name="l250"></a> }
<a name="l251"></a> </span><span class=cF1>case</span><span class=cF0> MODR_RIP_REL:
<a name="l252"></a> </span><span class=cFD>ICU32</span><span class=cF0>(tmpi,d-</span><span class=cF7>(</span><span class=cF0>rip+4+tmpi-&gt;ic_cnt</span><span class=cF7>)</span><span class=cF0>);
<a name="l253"></a> tmpi-&gt;ic_flags&amp;=~</span><span class=cF3>ICF_CODE_FINAL</span><span class=cF0>;
<a name="l254"></a> </span><span class=cF1>break</span><span class=cF0>;
<a name="l255"></a> </span><span class=cF7>}</span><span class=cF0>
<a name="l256"></a>}
<a name="l257"></a>
<a name="l258"></a>#</span><span class=cF1>define</span><span class=cF0> SLASH_OP_INC 0x0003000000FFFE00
<a name="l259"></a>#</span><span class=cF1>define</span><span class=cF0> SLASH_OP_DEC 0x052B000000FFFE01
<a name="l260"></a>#</span><span class=cF1>define</span><span class=cF0> SLASH_OP_NOT 0x0000000000F7F602
<a name="l261"></a>#</span><span class=cF1>define</span><span class=cF0> SLASH_OP_NEG 0x0000000000F7F603
<a name="l262"></a>#</span><span class=cF1>define</span><span class=cF0> SLASH_OP_IMM_U8 0x0000000000838000
<a name="l263"></a>#</span><span class=cF1>define</span><span class=cF0> SLASH_OP_IMM_U32 0x0000000000818300
<a name="l264"></a>#</span><span class=cF1>define</span><span class=cF0> SLASH_OP_MUL 0x0000000000F7F604
<a name="l265"></a>#</span><span class=cF1>define</span><span class=cF0> SLASH_OP_IMUL 0x0000000000F7F605
<a name="l266"></a>#</span><span class=cF1>define</span><span class=cF0> SLASH_OP_DIV 0x0000000000F7F606
<a name="l267"></a>#</span><span class=cF1>define</span><span class=cF0> SLASH_OP_MOV 0x0000000000898800
<a name="l268"></a>#</span><span class=cF1>define</span><span class=cF0> SLASH_OP_MOV_IMM 0x0000000000C7C600
<a name="l269"></a>#</span><span class=cF1>define</span><span class=cF0> SLASH_OP_PUSH 0x0000000000FFFF06
<a name="l270"></a>#</span><span class=cF1>define</span><span class=cF0> SLASH_OP_POP 0x00000000008F8F00
<a name="l271"></a>#</span><span class=cF1>define</span><span class=cF0> SLASH_OP_FADD 0x0000C1DE01DCDC00
<a name="l272"></a>#</span><span class=cF1>define</span><span class=cF0> SLASH_OP_FSUB 0x0000E9DE01DCDC04
<a name="l273"></a>#</span><span class=cF1>define</span><span class=cF0> SLASH_OP_FSUBR 0x0000E1DE01DCDC05
<a name="l274"></a>#</span><span class=cF1>define</span><span class=cF0> SLASH_OP_FMUL 0x0000C9DE01DCDC01
<a name="l275"></a>#</span><span class=cF1>define</span><span class=cF0> SLASH_OP_FDIV 0x0000F9DE01DCDC06
<a name="l276"></a>#</span><span class=cF1>define</span><span class=cF0> SLASH_OP_FDIVR 0x0000F1DE01DCDC07
<a name="l277"></a>#</span><span class=cF1>define</span><span class=cF0> SLASH_OP_FLD 0x0000000001DDDD00
<a name="l278"></a>#</span><span class=cF1>define</span><span class=cF0> SLASH_OP_FSTP 0x0000000001DDDD03
<a name="l279"></a>#</span><span class=cF1>define</span><span class=cF0> SLASH_OP_FISTTP 0x0000000001DDDD01
<a name="l280"></a>#</span><span class=cF1>define</span><span class=cF0> SLASH_OP_FILD 0x0000000001DFDF05
<a name="l281"></a>
<a name="l282"></a></span><span class=cF1>U0</span><span class=cF0> </span><span class=cFD>ICSlashOp</span><span class=cF0>(</span><span class=cF9>CIntermediateCode</span><span class=cF0> *tmpi,</span><span class=cF9>CICType</span><span class=cF0> t1,</span><span class=cF9>I64</span><span class=cF0> r1,</span><span class=cF9>I64</span><span class=cF0> d1,</span><span class=cF9>I64</span><span class=cF0> op,</span><span class=cF9>I64</span><span class=cF0> rip)
<a name="l283"></a>{
<a name="l284"></a> </span><span class=cF9>I64</span><span class=cF0> i;
<a name="l285"></a> </span><span class=cF1>if</span><span class=cF0> (t1&amp;</span><span class=cF3>MDF_REG</span><span class=cF0> &amp;&amp; !op.u8[3])
<a name="l286"></a> t1=t1&amp;(</span><span class=cF3>MDG_MASK</span><span class=cF0>|</span><span class=cF3>RTF_UNSIGNED</span><span class=cF0>)+</span><span class=cF3>RT_I64</span><span class=cF0>; </span><span class=cF2>//Set to 64 bit,preserving unsigned</span><span class=cF0>
<a name="l287"></a> i=</span><span class=cFD>ICModr1</span><span class=cF0>(op.u8[0],t1,r1,d1);
<a name="l288"></a> </span><span class=cF1>if</span><span class=cF0> (tmpi-&gt;ic_flags&amp;</span><span class=cF3>ICF_LOCK</span><span class=cF0> &amp;&amp; !</span><span class=cF7>(</span><span class=cF0>t1&amp;</span><span class=cF3>MDF_REG</span><span class=cF7>)</span><span class=cF0> &amp;&amp;
<a name="l289"></a> op&amp;~7!=SLASH_OP_MOV &amp;&amp; op!=SLASH_OP_MOV_IMM)
<a name="l290"></a> </span><span class=cFD>ICU8</span><span class=cF0>(tmpi,</span><span class=cF3>OC_LOCK_PREFIX</span><span class=cF0>);
<a name="l291"></a> </span><span class=cF1>switch</span><span class=cF0> (t1.raw_type) </span><span class=cF7>{</span><span class=cF0>
<a name="l292"></a> </span><span class=cF1>case</span><span class=cF0> </span><span class=cF3>RT_I8</span><span class=cF0>:
<a name="l293"></a> </span><span class=cF1>case</span><span class=cF0> </span><span class=cF3>RT_U8</span><span class=cF0>:
<a name="l294"></a> </span><span class=cFD>ICRex</span><span class=cF0>(tmpi,i.u8[1]);
<a name="l295"></a> </span><span class=cFD>ICU16</span><span class=cF0>(tmpi,i.u8[2]&lt;&lt;8+op.u8[1]);
<a name="l296"></a> </span><span class=cF1>break</span><span class=cF0>;
<a name="l297"></a> </span><span class=cF1>case</span><span class=cF0> </span><span class=cF3>RT_I16</span><span class=cF0>:
<a name="l298"></a> </span><span class=cF1>case</span><span class=cF0> </span><span class=cF3>RT_U16</span><span class=cF0>:
<a name="l299"></a> </span><span class=cFD>ICOpSizeRex</span><span class=cF0>(tmpi,i.u8[1]);
<a name="l300"></a> </span><span class=cFD>ICU16</span><span class=cF0>(tmpi,i.u8[2]&lt;&lt;8+op.u8[2]);
<a name="l301"></a> </span><span class=cF1>break</span><span class=cF0>;
<a name="l302"></a> </span><span class=cF1>default</span><span class=cF0>:
<a name="l303"></a> </span><span class=cF1>if</span><span class=cF0> (i.u8[1]!=0x48 || !op.u8[3])
<a name="l304"></a> </span><span class=cFD>ICRex</span><span class=cF0>(tmpi,i.u8[1]);
<a name="l305"></a> </span><span class=cFD>ICU16</span><span class=cF0>(tmpi,i.u8[2]&lt;&lt;8+op.u8[2]);
<a name="l306"></a> </span><span class=cF7>}</span><span class=cF0>
<a name="l307"></a> </span><span class=cF1>if</span><span class=cF0> (i.u8[0]==MODR_RIP_REL&amp;&amp; </span><span class=cF7>(</span><span class=cF0>op==SLASH_OP_MOV_IMM || op&amp;~7==SLASH_OP_IMM_U32</span><span class=cF7>)</span><span class=cF0>)
<a name="l308"></a> i.u8[0]=MODR_RIP_REL_IMM_U32;
<a name="l309"></a> </span><span class=cFD>ICModr2</span><span class=cF0>(tmpi,i,t1,d1,rip);
<a name="l310"></a>}
<a name="l311"></a>
<a name="l312"></a></span><span class=cF1>U0</span><span class=cF0> </span><span class=cFD>ICPush</span><span class=cF0>(</span><span class=cF9>CIntermediateCode</span><span class=cF0> *tmpi,</span><span class=cF9>CICType</span><span class=cF0> t1,</span><span class=cF9>I64</span><span class=cF0> r1,</span><span class=cF9>I64</span><span class=cF0> d1,</span><span class=cF9>I64</span><span class=cF0> rip)
<a name="l313"></a>{
<a name="l314"></a> </span><span class=cF1>switch</span><span class=cF0> (</span><span class=cF5>Bsr</span><span class=cF7>(</span><span class=cF0>t1</span><span class=cF7>)</span><span class=cF0>) </span><span class=cF7>{</span><span class=cF0>
<a name="l315"></a> </span><span class=cF1>case</span><span class=cF0> </span><span class=cF3>MDf_REG</span><span class=cF0>:
<a name="l316"></a> </span><span class=cF1>if</span><span class=cF0> (r1&gt;7)
<a name="l317"></a> </span><span class=cFD>ICU16</span><span class=cF0>(tmpi,0x5049+</span><span class=cF7>(</span><span class=cF0>r1&amp;7</span><span class=cF7>)</span><span class=cF0>&lt;&lt;8);
<a name="l318"></a> </span><span class=cF1>else</span><span class=cF0>
<a name="l319"></a> </span><span class=cFD>ICU8</span><span class=cF0>(tmpi,0x50+r1);
<a name="l320"></a> </span><span class=cF1>return</span><span class=cF0>;
<a name="l321"></a> </span><span class=cF1>case</span><span class=cF0> </span><span class=cF3>MDf_IMM</span><span class=cF0>:
<a name="l322"></a> </span><span class=cF1>if</span><span class=cF0> (</span><span class=cF3>I8_MIN</span><span class=cF0>&lt;=d1&lt;=</span><span class=cF3>I8_MAX</span><span class=cF0>)
<a name="l323"></a> </span><span class=cFD>ICU16</span><span class=cF0>(tmpi,0x6A+d1&lt;&lt;8);
<a name="l324"></a> </span><span class=cF1>else</span><span class=cF0> </span><span class=cF1>if</span><span class=cF0> (</span><span class=cF3>I32_MIN</span><span class=cF0>&lt;=d1&lt;=</span><span class=cF3>I32_MAX</span><span class=cF0>) {
<a name="l325"></a> </span><span class=cFD>ICU8</span><span class=cF0>(tmpi,0x68);
<a name="l326"></a> </span><span class=cFD>ICU32</span><span class=cF0>(tmpi,d1);
<a name="l327"></a> } </span><span class=cF1>else</span><span class=cF0> {
<a name="l328"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi,</span><span class=cF3>MDF_REG</span><span class=cF0>+</span><span class=cF3>RT_I64</span><span class=cF0>,</span><span class=cF3>REG_RBX</span><span class=cF0>,0,t1,r1,d1,rip);
<a name="l329"></a> </span><span class=cFD>ICU8</span><span class=cF0>(tmpi,0x50+</span><span class=cF3>REG_RBX</span><span class=cF0>);
<a name="l330"></a> }
<a name="l331"></a> </span><span class=cF1>return</span><span class=cF0>;
<a name="l332"></a> </span><span class=cF1>case</span><span class=cF0> </span><span class=cF3>MDf_STK</span><span class=cF0>:
<a name="l333"></a> </span><span class=cF1>return</span><span class=cF0>;
<a name="l334"></a> </span><span class=cF1>case</span><span class=cF0> </span><span class=cF3>MDf_DISP</span><span class=cF0>:
<a name="l335"></a> </span><span class=cF1>case</span><span class=cF0> </span><span class=cF3>MDf_SIB</span><span class=cF0>:
<a name="l336"></a> </span><span class=cF1>case</span><span class=cF0> </span><span class=cF3>MDf_RIP_DISP32</span><span class=cF0>:
<a name="l337"></a> </span><span class=cF1>switch</span><span class=cF0> (t1.raw_type) {
<a name="l338"></a> </span><span class=cF1>case</span><span class=cF0> </span><span class=cF3>RT_I64</span><span class=cF0>:
<a name="l339"></a> </span><span class=cF1>case</span><span class=cF0> </span><span class=cF3>RT_U64</span><span class=cF0>:
<a name="l340"></a> </span><span class=cF1>case</span><span class=cF0> </span><span class=cF3>RT_F64</span><span class=cF0>:
<a name="l341"></a> </span><span class=cFD>ICSlashOp</span><span class=cF0>(tmpi,t1,r1,d1,SLASH_OP_PUSH,rip);
<a name="l342"></a> </span><span class=cF1>return</span><span class=cF0>;
<a name="l343"></a> }
<a name="l344"></a> </span><span class=cF1>break</span><span class=cF0>;
<a name="l345"></a> </span><span class=cF7>}</span><span class=cF0>
<a name="l346"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi,</span><span class=cF3>MDF_REG</span><span class=cF0>+</span><span class=cF3>RT_I64</span><span class=cF0>,</span><span class=cF3>REG_RBX</span><span class=cF0>,0,t1,r1,d1,rip);
<a name="l347"></a> </span><span class=cFD>ICU16</span><span class=cF0>(tmpi,0x5048+</span><span class=cF3>REG_RBX</span><span class=cF0>&lt;&lt;8);
<a name="l348"></a>}
<a name="l349"></a>
<a name="l350"></a></span><span class=cF1>U0</span><span class=cF0> </span><span class=cFD>ICPushRegs</span><span class=cF0>(</span><span class=cF9>CIntermediateCode</span><span class=cF0> *tmpi,</span><span class=cF9>I64</span><span class=cF0> mask)
<a name="l351"></a>{
<a name="l352"></a> </span><span class=cF9>I64</span><span class=cF0> i;
<a name="l353"></a> </span><span class=cF1>for</span><span class=cF0> (i=0;i&lt;</span><span class=cF3>REG_REGS_NUM</span><span class=cF0>;i++) </span><span class=cF7>{</span><span class=cF0>
<a name="l354"></a> </span><span class=cF1>if</span><span class=cF0> (</span><span class=cF5>Bt</span><span class=cF7>(</span><span class=cF0>&amp;mask,i</span><span class=cF7>)</span><span class=cF0>) {
<a name="l355"></a> </span><span class=cF1>if</span><span class=cF0> (i&gt;7)
<a name="l356"></a> </span><span class=cFD>ICU16</span><span class=cF0>(tmpi,0x5049+</span><span class=cF7>(</span><span class=cF0>i&amp;7</span><span class=cF7>)</span><span class=cF0>&lt;&lt;8);
<a name="l357"></a> </span><span class=cF1>else</span><span class=cF0>
<a name="l358"></a> </span><span class=cFD>ICU8</span><span class=cF0>(tmpi,0x50+i);
<a name="l359"></a> }
<a name="l360"></a> </span><span class=cF7>}</span><span class=cF0>
<a name="l361"></a>}
<a name="l362"></a>
<a name="l363"></a></span><span class=cF1>U0</span><span class=cF0> </span><span class=cFD>ICPop</span><span class=cF0>(</span><span class=cF9>CIntermediateCode</span><span class=cF0> *tmpi,</span><span class=cF9>CICType</span><span class=cF0> t1,</span><span class=cF9>I64</span><span class=cF0> r1,</span><span class=cF9>I64</span><span class=cF0> d1,</span><span class=cF9>I64</span><span class=cF0> rip)
<a name="l364"></a>{
<a name="l365"></a> </span><span class=cF1>switch</span><span class=cF0> (</span><span class=cF5>Bsr</span><span class=cF7>(</span><span class=cF0>t1</span><span class=cF7>)</span><span class=cF0>) </span><span class=cF7>{</span><span class=cF0>
<a name="l366"></a> </span><span class=cF1>case</span><span class=cF0> </span><span class=cF3>MDf_REG</span><span class=cF0>:
<a name="l367"></a> </span><span class=cF1>if</span><span class=cF0> (r1&gt;7)
<a name="l368"></a> </span><span class=cFD>ICU16</span><span class=cF0>(tmpi,0x5849+</span><span class=cF7>(</span><span class=cF0>r1&amp;7</span><span class=cF7>)</span><span class=cF0>&lt;&lt;8);
<a name="l369"></a> </span><span class=cF1>else</span><span class=cF0>
<a name="l370"></a> </span><span class=cFD>ICU8</span><span class=cF0>(tmpi,0x58+r1);
<a name="l371"></a> </span><span class=cF1>break</span><span class=cF0>;
<a name="l372"></a> </span><span class=cF1>case</span><span class=cF0> </span><span class=cF3>MDf_DISP</span><span class=cF0>:
<a name="l373"></a> </span><span class=cF1>case</span><span class=cF0> </span><span class=cF3>MDf_RIP_DISP32</span><span class=cF0>:
<a name="l374"></a> </span><span class=cF1>case</span><span class=cF0> </span><span class=cF3>MDf_SIB</span><span class=cF0>:
<a name="l375"></a> </span><span class=cF1>if</span><span class=cF0> (t1.raw_type&lt;</span><span class=cF3>RT_I64</span><span class=cF0>) {
<a name="l376"></a> </span><span class=cFD>ICU8</span><span class=cF0>(tmpi,0x58+</span><span class=cF3>REG_RBX</span><span class=cF0>);
<a name="l377"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi,t1,r1,d1,</span><span class=cF3>MDF_REG</span><span class=cF0>+</span><span class=cF3>RT_I64</span><span class=cF0>,</span><span class=cF3>REG_RBX</span><span class=cF0>,0,rip);
<a name="l378"></a> } </span><span class=cF1>else</span><span class=cF0>
<a name="l379"></a> </span><span class=cFD>ICSlashOp</span><span class=cF0>(tmpi,t1,r1,d1,SLASH_OP_POP,rip);
<a name="l380"></a> </span><span class=cF1>break</span><span class=cF0>;
<a name="l381"></a> </span><span class=cF1>case</span><span class=cF0> </span><span class=cF3>MDf_STK</span><span class=cF0>:
<a name="l382"></a> </span><span class=cF1>case</span><span class=cF0> </span><span class=cF3>MDf_IMM</span><span class=cF0>:
<a name="l383"></a> </span><span class=cFD>ICU8</span><span class=cF0>(tmpi,0x58+</span><span class=cF3>REG_RBX</span><span class=cF0>);
<a name="l384"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi,t1,r1,d1,</span><span class=cF3>MDF_REG</span><span class=cF0>+</span><span class=cF3>RT_I64</span><span class=cF0>,</span><span class=cF3>REG_RBX</span><span class=cF0>,0,rip);
<a name="l385"></a> </span><span class=cF1>break</span><span class=cF0>;
<a name="l386"></a> </span><span class=cF1>default</span><span class=cF0>:
<a name="l387"></a> </span><span class=cFD>ICAddRSP</span><span class=cF0>(tmpi,8);
<a name="l388"></a> </span><span class=cF7>}</span><span class=cF0>
<a name="l389"></a>}
<a name="l390"></a>
<a name="l391"></a></span><span class=cF1>U0</span><span class=cF0> </span><span class=cFD>ICPopRegs</span><span class=cF0>(</span><span class=cF9>CIntermediateCode</span><span class=cF0> *tmpi,</span><span class=cF9>I64</span><span class=cF0> mask)
<a name="l392"></a>{
<a name="l393"></a> </span><span class=cF9>I64</span><span class=cF0> i;
<a name="l394"></a> </span><span class=cF1>for</span><span class=cF0> (i=</span><span class=cF3>REG_REGS_NUM</span><span class=cF0>-1;i&gt;=0;i--) </span><span class=cF7>{</span><span class=cF0>
<a name="l395"></a> </span><span class=cF1>if</span><span class=cF0> (</span><span class=cF5>Bt</span><span class=cF7>(</span><span class=cF0>&amp;mask,i</span><span class=cF7>)</span><span class=cF0>) {
<a name="l396"></a> </span><span class=cF1>if</span><span class=cF0> (i&gt;7)
<a name="l397"></a> </span><span class=cFD>ICU16</span><span class=cF0>(tmpi,0x5849+</span><span class=cF7>(</span><span class=cF0>i&amp;7</span><span class=cF7>)</span><span class=cF0>&lt;&lt;8);
<a name="l398"></a> </span><span class=cF1>else</span><span class=cF0>
<a name="l399"></a> </span><span class=cFD>ICU8</span><span class=cF0>(tmpi,0x58+i);
<a name="l400"></a> }
<a name="l401"></a> </span><span class=cF7>}</span><span class=cF0>
<a name="l402"></a>}
<a name="l403"></a>
<a name="l404"></a></span><span class=cF1>U0</span><span class=cF0> </span><span class=cFD>ICZero</span><span class=cF0>(</span><span class=cF9>CIntermediateCode</span><span class=cF0> *tmpi,</span><span class=cF9>I64</span><span class=cF0> r)
<a name="l405"></a>{
<a name="l406"></a> </span><span class=cF1>if</span><span class=cF0> (r&gt;7) </span><span class=cF7>{</span><span class=cF0>
<a name="l407"></a> r&amp;=7;
<a name="l408"></a> </span><span class=cFD>ICU24</span><span class=cF0>(tmpi,0xC0334D+r&lt;&lt;16+r&lt;&lt;19);
<a name="l409"></a> </span><span class=cF7>}</span><span class=cF0> </span><span class=cF1>else</span><span class=cF0>
<a name="l410"></a> </span><span class=cFD>ICU16</span><span class=cF0>(tmpi,0xC033+r&lt;&lt;8+r&lt;&lt;11);
<a name="l411"></a>}
<a name="l412"></a>
<a name="l413"></a></span><span class=cF1>U0</span><span class=cF0> </span><span class=cFD>ICTest</span><span class=cF0>(</span><span class=cF9>CIntermediateCode</span><span class=cF0> *tmpi,</span><span class=cF9>I64</span><span class=cF0> r)
<a name="l414"></a>{
<a name="l415"></a> </span><span class=cF9>I64</span><span class=cF0> i=0xC08548; </span><span class=cF2>//TEST R,R</span><span class=cF0>
<a name="l416"></a> </span><span class=cF1>if</span><span class=cF0> (r&gt;7) </span><span class=cF7>{</span><span class=cF0>
<a name="l417"></a> i+=5;
<a name="l418"></a> r&amp;=7;
<a name="l419"></a> </span><span class=cF7>}</span><span class=cF0>
<a name="l420"></a> </span><span class=cFD>ICU24</span><span class=cF0>(tmpi,i+r&lt;&lt;16+r&lt;&lt;19);
<a name="l421"></a>}
<a name="l422"></a>
<a name="l423"></a></span><span class=cF9>I64</span><span class=cF0> </span><span class=cFD>ICBuiltInFloatConst</span><span class=cF0>(</span><span class=cF1>F64</span><span class=cF0> d)
<a name="l424"></a>{</span><span class=cF2>//Returns 2-byte opcode for FLD const or zero</span><span class=cF0>
<a name="l425"></a> </span><span class=cF1>if</span><span class=cF0> (!d)
<a name="l426"></a> </span><span class=cF1>return</span><span class=cF0> 0xEED9;
<a name="l427"></a> </span><span class=cF1>else</span><span class=cF0> </span><span class=cF1>if</span><span class=cF0> (d==1.0)
<a name="l428"></a> </span><span class=cF1>return</span><span class=cF0> 0xE8D9;
<a name="l429"></a> </span><span class=cF1>else</span><span class=cF0> </span><span class=cF1>if</span><span class=cF0> (</span><span class=cF5>GetOption</span><span class=cF7>(</span><span class=cF3>OPTf_NO_BUILTIN_CONST</span><span class=cF7>)</span><span class=cF0>)
<a name="l430"></a> </span><span class=cF1>return</span><span class=cF0> 0;
<a name="l431"></a> </span><span class=cF1>else</span><span class=cF0> </span><span class=cF1>if</span><span class=cF0> (d==</span><span class=cF3>pi</span><span class=cF0>)
<a name="l432"></a> </span><span class=cF1>return</span><span class=cF0> 0xEBD9;
<a name="l433"></a> </span><span class=cF1>else</span><span class=cF0> </span><span class=cF1>if</span><span class=cF0> (d==</span><span class=cF3>log2_10</span><span class=cF0>)
<a name="l434"></a> </span><span class=cF1>return</span><span class=cF0> 0xE9D9;
<a name="l435"></a> </span><span class=cF1>else</span><span class=cF0> </span><span class=cF1>if</span><span class=cF0> (d==</span><span class=cF3>log2_e</span><span class=cF0>)
<a name="l436"></a> </span><span class=cF1>return</span><span class=cF0> 0xEAD9;
<a name="l437"></a> </span><span class=cF1>else</span><span class=cF0> </span><span class=cF1>if</span><span class=cF0> (d==</span><span class=cF3>log10_2</span><span class=cF0>)
<a name="l438"></a> </span><span class=cF1>return</span><span class=cF0> 0xECD9;
<a name="l439"></a> </span><span class=cF1>else</span><span class=cF0> </span><span class=cF1>if</span><span class=cF0> (d==</span><span class=cF3>loge_2</span><span class=cF0>)
<a name="l440"></a> </span><span class=cF1>return</span><span class=cF0> 0xEDD9;
<a name="l441"></a> </span><span class=cF1>else</span><span class=cF0>
<a name="l442"></a> </span><span class=cF1>return</span><span class=cF0> 0;
<a name="l443"></a>}
<a name="l444"></a>
<a name="l445"></a></span><span class=cF1>U0</span><span class=cF0> </span><span class=cFD>ICMov</span><span class=cF0>(</span><span class=cF9>CIntermediateCode</span><span class=cF0> *tmpi,
<a name="l446"></a> </span><span class=cF9>CICType</span><span class=cF0> t1,</span><span class=cF9>I64</span><span class=cF0> r1,</span><span class=cF9>I64</span><span class=cF0> d1,</span><span class=cF9>CICType</span><span class=cF0> t2,</span><span class=cF9>I64</span><span class=cF0> r2,</span><span class=cF9>I64</span><span class=cF0> d2,</span><span class=cF9>I64</span><span class=cF0> rip)
<a name="l447"></a>{
<a name="l448"></a> </span><span class=cF9>I64</span><span class=cF0> i,cnt1,cnt2,b1_rex,b2_rex,b1,b2,b1_modr,b2_modr,
<a name="l449"></a> b1_r1,b1_r2,b2_r1,b2_r2,last_start=tmpi-&gt;ic_cnt;
<a name="l450"></a> </span><span class=cF9>CIntermediateCode</span><span class=cF0> *tmpil1;
<a name="l451"></a> </span><span class=cF1>Bool</span><span class=cF0> old_lock=</span><span class=cF5>Btr</span><span class=cF0>(&amp;tmpi-&gt;ic_flags,</span><span class=cF3>ICf_LOCK</span><span class=cF0>);
<a name="l452"></a> </span><span class=cF1>switch</span><span class=cF0> (</span><span class=cF5>Bsr</span><span class=cF7>(</span><span class=cF0>t1</span><span class=cF7>)</span><span class=cF0>) </span><span class=cF7>{</span><span class=cF0>
<a name="l453"></a> </span><span class=cF1>case</span><span class=cF0> </span><span class=cF3>MDf_REG</span><span class=cF0>:
<a name="l454"></a> </span><span class=cF1>if</span><span class=cF0> (t2&amp;</span><span class=cF3>MDF_IMM</span><span class=cF0>) {
<a name="l455"></a> </span><span class=cF1>if</span><span class=cF0> (!d2)
<a name="l456"></a> </span><span class=cFD>ICZero</span><span class=cF0>(tmpi,r1);
<a name="l457"></a> </span><span class=cF1>else</span><span class=cF0> </span><span class=cF1>if</span><span class=cF0> (0&lt;=d2&lt;=</span><span class=cF3>U8_MAX</span><span class=cF0>) </span><span class=cF7>{</span><span class=cF0>
<a name="l458"></a> </span><span class=cFD>ICZero</span><span class=cF0>(tmpi,r1);
<a name="l459"></a> </span><span class=cF1>if</span><span class=cF0> (r1&gt;7)
<a name="l460"></a> </span><span class=cFD>ICU24</span><span class=cF0>(tmpi,d2&lt;&lt;16+</span><span class=cF7>(</span><span class=cF0>0xB0+r1&amp;7</span><span class=cF7>)</span><span class=cF0>&lt;&lt;8+0x41);
<a name="l461"></a> </span><span class=cF1>else</span><span class=cF0> </span><span class=cF1>if</span><span class=cF0> (r1&gt;3)
<a name="l462"></a> </span><span class=cFD>ICU24</span><span class=cF0>(tmpi,d2&lt;&lt;16+</span><span class=cF7>(</span><span class=cF0>0xB0+r1</span><span class=cF7>)</span><span class=cF0>&lt;&lt;8+0x40);
<a name="l463"></a> </span><span class=cF1>else</span><span class=cF0>
<a name="l464"></a> </span><span class=cFD>ICU16</span><span class=cF0>(tmpi,d2&lt;&lt;8+0xB0+r1);
<a name="l465"></a> </span><span class=cF7>}</span><span class=cF0> </span><span class=cF1>else</span><span class=cF0> </span><span class=cF1>if</span><span class=cF0> (</span><span class=cF3>I8_MIN</span><span class=cF0>&lt;=d2&lt;0) </span><span class=cF7>{</span><span class=cF0>
<a name="l466"></a> </span><span class=cF1>if</span><span class=cF0> (r1&gt;7) {
<a name="l467"></a> r1&amp;=7;
<a name="l468"></a> </span><span class=cFD>ICU24</span><span class=cF0>(tmpi,d2&lt;&lt;16+</span><span class=cF7>(</span><span class=cF0>0xB0+r1</span><span class=cF7>)</span><span class=cF0>&lt;&lt;8+0x41);
<a name="l469"></a> </span><span class=cFD>ICU32</span><span class=cF0>(tmpi,0xC0BE0F4D+r1&lt;&lt;24+r1&lt;&lt;27);
<a name="l470"></a> } </span><span class=cF1>else</span><span class=cF0> {
<a name="l471"></a> </span><span class=cF1>if</span><span class=cF0> (r1&gt;3)
<a name="l472"></a> </span><span class=cFD>ICU24</span><span class=cF0>(tmpi,d2&lt;&lt;16+</span><span class=cF7>(</span><span class=cF0>0xB0+r1</span><span class=cF7>)</span><span class=cF0>&lt;&lt;8+0x40);
<a name="l473"></a> </span><span class=cF1>else</span><span class=cF0>
<a name="l474"></a> </span><span class=cFD>ICU16</span><span class=cF0>(tmpi,d2&lt;&lt;8+0xB0+r1);
<a name="l475"></a> </span><span class=cFD>ICU32</span><span class=cF0>(tmpi,0xC0BE0F48+r1&lt;&lt;24+r1&lt;&lt;27);
<a name="l476"></a> }
<a name="l477"></a> </span><span class=cF7>}</span><span class=cF0> </span><span class=cF1>else</span><span class=cF0> </span><span class=cF1>if</span><span class=cF0> (0&lt;=d2&lt;=</span><span class=cF3>U32_MAX</span><span class=cF0>) </span><span class=cF7>{</span><span class=cF0>
<a name="l478"></a> </span><span class=cF1>if</span><span class=cF0> (r1&gt;7) {
<a name="l479"></a> r1&amp;=7;
<a name="l480"></a> </span><span class=cFD>ICU16</span><span class=cF0>(tmpi,</span><span class=cF7>(</span><span class=cF0>0xB8+r1</span><span class=cF7>)</span><span class=cF0>&lt;&lt;8+0x41);
<a name="l481"></a> </span><span class=cFD>ICU32</span><span class=cF0>(tmpi,d2);
<a name="l482"></a> } </span><span class=cF1>else</span><span class=cF0> {
<a name="l483"></a> </span><span class=cFD>ICU8</span><span class=cF0>(tmpi,0xB8+r1);
<a name="l484"></a> </span><span class=cFD>ICU32</span><span class=cF0>(tmpi,d2);
<a name="l485"></a> }
<a name="l486"></a> </span><span class=cF7>}</span><span class=cF0> </span><span class=cF1>else</span><span class=cF0> </span><span class=cF1>if</span><span class=cF0> (</span><span class=cF3>I32_MIN</span><span class=cF0>&lt;=d2&lt;0) </span><span class=cF7>{</span><span class=cF0>
<a name="l487"></a> </span><span class=cF1>if</span><span class=cF0> (r1&gt;7) {
<a name="l488"></a> r1&amp;=7;
<a name="l489"></a> </span><span class=cFD>ICU16</span><span class=cF0>(tmpi,</span><span class=cF7>(</span><span class=cF0>0xB8+r1</span><span class=cF7>)</span><span class=cF0>&lt;&lt;8+0x41);
<a name="l490"></a> </span><span class=cFD>ICU32</span><span class=cF0>(tmpi,d2);
<a name="l491"></a> </span><span class=cFD>ICU24</span><span class=cF0>(tmpi,0xC0634D+r1&lt;&lt;16+r1&lt;&lt;19);
<a name="l492"></a> } </span><span class=cF1>else</span><span class=cF0> {
<a name="l493"></a> </span><span class=cFD>ICU8</span><span class=cF0>(tmpi,0xB8+r1);
<a name="l494"></a> </span><span class=cFD>ICU32</span><span class=cF0>(tmpi,d2);
<a name="l495"></a> </span><span class=cFD>ICU24</span><span class=cF0>(tmpi,0xC06348+r1&lt;&lt;16+r1&lt;&lt;19);
<a name="l496"></a> }
<a name="l497"></a> </span><span class=cF7>}</span><span class=cF0> </span><span class=cF1>else</span><span class=cF0> </span><span class=cF7>{</span><span class=cF0>
<a name="l498"></a> i=0xB848;
<a name="l499"></a> </span><span class=cF1>if</span><span class=cF0> (r1&gt;7) {
<a name="l500"></a> i++;
<a name="l501"></a> r1&amp;=7;
<a name="l502"></a> }
<a name="l503"></a> </span><span class=cFD>ICU16</span><span class=cF0>(tmpi,i+r1&lt;&lt;8);
<a name="l504"></a> </span><span class=cFD>ICU64</span><span class=cF0>(tmpi,d2);
<a name="l505"></a> </span><span class=cF7>}</span><span class=cF0>
<a name="l506"></a> } </span><span class=cF1>else</span><span class=cF0> </span><span class=cF1>if</span><span class=cF0> (t2&amp;</span><span class=cF3>MDF_STK</span><span class=cF0>)
<a name="l507"></a> </span><span class=cFD>ICPop</span><span class=cF0>(tmpi,t1,r1,d1,rip);
<a name="l508"></a> </span><span class=cF1>else</span><span class=cF0> {
<a name="l509"></a> </span><span class=cF1>if</span><span class=cF0> (r1==r2 &amp;&amp; t2&amp;</span><span class=cF3>MDF_REG</span><span class=cF0>)
<a name="l510"></a> </span><span class=cF1>goto</span><span class=cF0> move_done;
<a name="l511"></a> </span><span class=cF1>if</span><span class=cF0> (t2&amp;</span><span class=cF3>MDF_REG</span><span class=cF0>)
<a name="l512"></a> t2=</span><span class=cF3>MDF_REG</span><span class=cF0>+</span><span class=cF3>RT_I64</span><span class=cF0>;
<a name="l513"></a> i=</span><span class=cFD>ICModr1</span><span class=cF0>(r1,t2,r2,d2);
<a name="l514"></a> </span><span class=cF1>if</span><span class=cF0> (t2.raw_type!=</span><span class=cF3>RT_U32</span><span class=cF0>)
<a name="l515"></a> i|=0x4800;
<a name="l516"></a> </span><span class=cFD>ICRex</span><span class=cF0>(tmpi,i.u8[1]);
<a name="l517"></a> </span><span class=cF1>switch</span><span class=cF0> (t2.raw_type) </span><span class=cF7>{</span><span class=cF0>
<a name="l518"></a> </span><span class=cF1>case</span><span class=cF0> </span><span class=cF3>RT_I8</span><span class=cF0>:
<a name="l519"></a> </span><span class=cFD>ICU24</span><span class=cF0>(tmpi,i.u8[2]&lt;&lt;16+0xBE0F);
<a name="l520"></a> </span><span class=cF1>break</span><span class=cF0>;
<a name="l521"></a> </span><span class=cF1>case</span><span class=cF0> </span><span class=cF3>RT_I16</span><span class=cF0>:
<a name="l522"></a> </span><span class=cFD>ICU24</span><span class=cF0>(tmpi,i.u8[2]&lt;&lt;16+0xBF0F);
<a name="l523"></a> </span><span class=cF1>break</span><span class=cF0>;
<a name="l524"></a> </span><span class=cF1>case</span><span class=cF0> </span><span class=cF3>RT_I32</span><span class=cF0>:
<a name="l525"></a> </span><span class=cFD>ICU16</span><span class=cF0>(tmpi,i.u8[2]&lt;&lt;8+0x63);
<a name="l526"></a> </span><span class=cF1>break</span><span class=cF0>;
<a name="l527"></a>
<a name="l528"></a> </span><span class=cF1>case</span><span class=cF0> </span><span class=cF3>RT_U8</span><span class=cF0>:
<a name="l529"></a> </span><span class=cFD>ICU24</span><span class=cF0>(tmpi,i.u8[2]&lt;&lt;16+0xB60F);
<a name="l530"></a> </span><span class=cF1>break</span><span class=cF0>;
<a name="l531"></a> </span><span class=cF1>case</span><span class=cF0> </span><span class=cF3>RT_U16</span><span class=cF0>:
<a name="l532"></a> </span><span class=cFD>ICU24</span><span class=cF0>(tmpi,i.u8[2]&lt;&lt;16+0xB70F);
<a name="l533"></a> </span><span class=cF1>break</span><span class=cF0>;
<a name="l534"></a> </span><span class=cF1>default</span><span class=cF0>:
<a name="l535"></a> </span><span class=cFD>ICU16</span><span class=cF0>(tmpi,i.u8[2]&lt;&lt;8+0x8B);
<a name="l536"></a> </span><span class=cF7>}</span><span class=cF0>
<a name="l537"></a> </span><span class=cFD>ICModr2</span><span class=cF0>(tmpi,i,,d2,rip);
<a name="l538"></a> }
<a name="l539"></a> </span><span class=cF1>break</span><span class=cF0>;
<a name="l540"></a> </span><span class=cF1>case</span><span class=cF0> </span><span class=cF3>MDf_STK</span><span class=cF0>:
<a name="l541"></a> </span><span class=cF1>if</span><span class=cF0> (tmpi-&gt;ic_flags&amp;</span><span class=cF3>ICF_PUSH_CMP</span><span class=cF0>)
<a name="l542"></a> </span><span class=cFD>ICPopRegs</span><span class=cF0>(tmpi,1&lt;&lt;</span><span class=cF3>REG_RBX</span><span class=cF0>);
<a name="l543"></a> </span><span class=cF1>if</span><span class=cF0> (t1.raw_type&lt;t2.raw_type)
<a name="l544"></a> </span><span class=cFD>ICPush</span><span class=cF0>(tmpi,t2&amp;</span><span class=cF3>MDG_MASK</span><span class=cF0>+t1.raw_type,r2,d2,rip);
<a name="l545"></a> </span><span class=cF1>else</span><span class=cF0>
<a name="l546"></a> </span><span class=cFD>ICPush</span><span class=cF0>(tmpi,t2,r2,d2,rip);
<a name="l547"></a> </span><span class=cF1>if</span><span class=cF0> (tmpi-&gt;ic_flags&amp;</span><span class=cF3>ICF_PUSH_CMP</span><span class=cF0>)
<a name="l548"></a> </span><span class=cFD>ICPushRegs</span><span class=cF0>(tmpi,1&lt;&lt;</span><span class=cF3>REG_RBX</span><span class=cF0>);
<a name="l549"></a> </span><span class=cF1>break</span><span class=cF0>;
<a name="l550"></a> </span><span class=cF1>case</span><span class=cF0> </span><span class=cF3>MDf_DISP</span><span class=cF0>:
<a name="l551"></a> </span><span class=cF1>case</span><span class=cF0> </span><span class=cF3>MDf_RIP_DISP32</span><span class=cF0>:
<a name="l552"></a> </span><span class=cF1>case</span><span class=cF0> </span><span class=cF3>MDf_SIB</span><span class=cF0>:
<a name="l553"></a> </span><span class=cF1>if</span><span class=cF0> (t2&amp;</span><span class=cF3>MDF_IMM</span><span class=cF0> &amp;&amp; </span><span class=cF7>(</span><span class=cF0>t1.raw_type&lt;</span><span class=cF3>RT_I64</span><span class=cF0> || (</span><span class=cF3>I32_MIN</span><span class=cF0>&lt;=d2&lt;=</span><span class=cF3>I32_MAX</span><span class=cF0>)</span><span class=cF7>)</span><span class=cF0>) {
<a name="l554"></a> </span><span class=cFD>ICSlashOp</span><span class=cF0>(tmpi,t1,r1,d1,SLASH_OP_MOV_IMM,rip);
<a name="l555"></a> </span><span class=cF1>switch</span><span class=cF0> (t1.raw_type) </span><span class=cF7>{</span><span class=cF0>
<a name="l556"></a> </span><span class=cF1>case</span><span class=cF0> </span><span class=cF3>RT_I8</span><span class=cF0>:
<a name="l557"></a> </span><span class=cF1>case</span><span class=cF0> </span><span class=cF3>RT_U8</span><span class=cF0>:
<a name="l558"></a> </span><span class=cFD>ICU8</span><span class=cF0>(tmpi,d2);
<a name="l559"></a> </span><span class=cF1>break</span><span class=cF0>;
<a name="l560"></a> </span><span class=cF1>case</span><span class=cF0> </span><span class=cF3>RT_I16</span><span class=cF0>:
<a name="l561"></a> </span><span class=cF1>case</span><span class=cF0> </span><span class=cF3>RT_U16</span><span class=cF0>:
<a name="l562"></a> </span><span class=cFD>ICU16</span><span class=cF0>(tmpi,d2);
<a name="l563"></a> </span><span class=cF1>break</span><span class=cF0>;
<a name="l564"></a> </span><span class=cF1>default</span><span class=cF0>:
<a name="l565"></a> </span><span class=cFD>ICU32</span><span class=cF0>(tmpi,d2);
<a name="l566"></a> </span><span class=cF7>}</span><span class=cF0>
<a name="l567"></a> } </span><span class=cF1>else</span><span class=cF0> {
<a name="l568"></a> </span><span class=cF1>if</span><span class=cF0> (t2&amp;</span><span class=cF3>MDF_REG</span><span class=cF0>)
<a name="l569"></a> </span><span class=cFD>ICSlashOp</span><span class=cF0>(tmpi,t1,r1,d1,r2+SLASH_OP_MOV,rip);
<a name="l570"></a> </span><span class=cF1>else</span><span class=cF0> </span><span class=cF7>{</span><span class=cF0>
<a name="l571"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi,</span><span class=cF3>MDF_REG</span><span class=cF0>+</span><span class=cF3>RT_I64</span><span class=cF0>,</span><span class=cF3>REG_RBX</span><span class=cF0>,0,t2,r2,d2,rip);
<a name="l572"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi,t1,r1,d1,</span><span class=cF3>MDF_REG</span><span class=cF0>+</span><span class=cF3>RT_I64</span><span class=cF0>,</span><span class=cF3>REG_RBX</span><span class=cF0>,0,rip);
<a name="l573"></a> </span><span class=cF7>}</span><span class=cF0>
<a name="l574"></a> }
<a name="l575"></a> </span><span class=cF1>break</span><span class=cF0>;
<a name="l576"></a> </span><span class=cF7>}</span><span class=cF0>
<a name="l577"></a>move_done:
<a name="l578"></a> </span><span class=cF1>if</span><span class=cF0> (!</span><span class=cF7>(</span><span class=cF0>(t1|t2)&amp;(</span><span class=cF3>MDF_STK</span><span class=cF0>|</span><span class=cF3>MDF_RIP_DISP32</span><span class=cF0>)</span><span class=cF7>)</span><span class=cF0>) </span><span class=cF7>{</span><span class=cF0>
<a name="l579"></a> tmpil1=tmpi;
<a name="l580"></a> </span><span class=cF1>if</span><span class=cF0> (tmpi-&gt;ic_last_start&lt;0 &amp;&amp; </span><span class=cF7>(</span><span class=cF0>tmpil1=</span><span class=cFD>OptLag1</span><span class=cF0>(tmpi)</span><span class=cF7>)</span><span class=cF0> &amp;&amp;
<a name="l581"></a> tmpil1-&gt;ic_last_start&lt;0)
<a name="l582"></a> tmpil1=</span><span class=cF3>NULL</span><span class=cF0>;
<a name="l583"></a> </span><span class=cF1>if</span><span class=cF0> (tmpil1) {
<a name="l584"></a> </span><span class=cF1>if</span><span class=cF0> (tmpil1==tmpi)
<a name="l585"></a> cnt1=last_start-tmpil1-&gt;ic_last_start;
<a name="l586"></a> </span><span class=cF1>else</span><span class=cF0> </span><span class=cF7>{</span><span class=cF0>
<a name="l587"></a> </span><span class=cF1>if</span><span class=cF0> (!</span><span class=cF7>(</span><span class=cF0>tmpil1-&gt;ic_flags&amp;</span><span class=cF3>ICF_CODE_FINAL</span><span class=cF7>)</span><span class=cF0>)
<a name="l588"></a> tmpi-&gt;ic_flags&amp;=~</span><span class=cF3>ICF_CODE_FINAL</span><span class=cF0>;
<a name="l589"></a> </span><span class=cF1>if</span><span class=cF0> (last_start)
<a name="l590"></a> cnt1=0;
<a name="l591"></a> </span><span class=cF1>else</span><span class=cF0>
<a name="l592"></a> cnt1=tmpil1-&gt;ic_cnt-tmpil1-&gt;ic_last_start;
<a name="l593"></a> </span><span class=cF7>}</span><span class=cF0>
<a name="l594"></a> cnt2=tmpi-&gt;ic_cnt-last_start;
<a name="l595"></a> </span><span class=cF1>if</span><span class=cF0> (cnt1 &amp;&amp; cnt1==cnt2) </span><span class=cF7>{</span><span class=cF0>
<a name="l596"></a> b1_rex=tmpil1-&gt;ic_body[tmpil1-&gt;ic_last_start];
<a name="l597"></a> b2_rex=tmpi-&gt;ic_body[last_start];
<a name="l598"></a> </span><span class=cF1>if</span><span class=cF0> (b1_rex&amp;0x48==0x48 &amp;&amp; b2_rex&amp;0x48==0x48) {
<a name="l599"></a> </span><span class=cF1>for</span><span class=cF0> (i=1;i&lt;cnt1;i++)
<a name="l600"></a> </span><span class=cF1>if</span><span class=cF0> (</span><span class=cF7>(</span><span class=cF0>b1=tmpil1-&gt;ic_body[tmpil1-&gt;ic_last_start+i]</span><span class=cF7>)</span><span class=cF0>==
<a name="l601"></a> </span><span class=cF7>(</span><span class=cF0>b2=tmpi-&gt;ic_body[last_start+i]</span><span class=cF7>)</span><span class=cF0>) </span><span class=cF7>{</span><span class=cF0>
<a name="l602"></a> </span><span class=cF1>if</span><span class=cF0> (i==1 &amp;&amp; </span><span class=cF7>(</span><span class=cF0>b2==0x89 || b2==0x8B</span><span class=cF7>)</span><span class=cF0>) {
<a name="l603"></a> b1_modr=tmpil1-&gt;ic_body[tmpil1-&gt;ic_last_start+2];
<a name="l604"></a> b1_r1=b1_modr&amp;7 +</span><span class=cF5>Bt</span><span class=cF0>(&amp;b1_rex,0)&lt;&lt;3;
<a name="l605"></a> b1_r2=b1_modr&gt;&gt;3&amp;7+</span><span class=cF5>Bt</span><span class=cF0>(&amp;b1_rex,2)&lt;&lt;3;
<a name="l606"></a> b2_modr=tmpi-&gt;ic_body[last_start+2];
<a name="l607"></a> b2_r1=b2_modr&amp;7 +</span><span class=cF5>Bt</span><span class=cF0>(&amp;b2_rex,0)&lt;&lt;3;
<a name="l608"></a> b2_r2=b2_modr&gt;&gt;3&amp;7+</span><span class=cF5>Bt</span><span class=cF0>(&amp;b2_rex,2)&lt;&lt;3;
<a name="l609"></a> </span><span class=cF1>if</span><span class=cF0> (cnt1==3 &amp;&amp; b2_modr&amp;0xC0==0xC0) </span><span class=cF7>{</span><span class=cF0>
<a name="l610"></a> </span><span class=cF1>if</span><span class=cF0> (b2_r1==b2_r2)
<a name="l611"></a> </span><span class=cF1>goto</span><span class=cF0> move_redundant;
<a name="l612"></a> </span><span class=cF1>if</span><span class=cF0> (b1_modr&amp;0xC0==0xC0) {
<a name="l613"></a> </span><span class=cF1>if</span><span class=cF0> (b1_r1==b2_r2 &amp;&amp; b2_r1==b1_r2)
<a name="l614"></a> </span><span class=cF1>goto</span><span class=cF0> move_redundant;
<a name="l615"></a> }
<a name="l616"></a> </span><span class=cF7>}</span><span class=cF0> </span><span class=cF1>else</span><span class=cF0> </span><span class=cF1>if</span><span class=cF0> (b1_rex!=b2_rex || b1_r1==b1_r2 || </span><span class=cF7>(</span><span class=cF0>t1|t2</span><span class=cF7>)</span><span class=cF0>&amp;</span><span class=cF3>MDF_SIB</span><span class=cF0>)
<a name="l617"></a> </span><span class=cF1>break</span><span class=cF0>;
<a name="l618"></a> } </span><span class=cF1>else</span><span class=cF0> </span><span class=cF1>if</span><span class=cF0> (b1_rex!=b2_rex)
<a name="l619"></a> </span><span class=cF1>break</span><span class=cF0>;
<a name="l620"></a> </span><span class=cF7>}</span><span class=cF0> </span><span class=cF1>else</span><span class=cF0> </span><span class=cF1>if</span><span class=cF0> (i!=1)
<a name="l621"></a> </span><span class=cF1>break</span><span class=cF0>;
<a name="l622"></a> </span><span class=cF1>else</span><span class=cF0> </span><span class=cF1>if</span><span class=cF0> (b2!=0x89 &amp;&amp; b2!=0x8B)
<a name="l623"></a> </span><span class=cF1>break</span><span class=cF0>;
<a name="l624"></a> </span><span class=cF1>else</span><span class=cF0> </span><span class=cF7>{</span><span class=cF0>
<a name="l625"></a> b1_modr=tmpil1-&gt;ic_body[tmpil1-&gt;ic_last_start+2];
<a name="l626"></a> b1_r1=b1_modr&amp;7 +</span><span class=cF5>Bt</span><span class=cF0>(&amp;b1_rex,0)&lt;&lt;3;
<a name="l627"></a> b1_r2=b1_modr&gt;&gt;3&amp;7+</span><span class=cF5>Bt</span><span class=cF0>(&amp;b1_rex,2)&lt;&lt;3;
<a name="l628"></a> b2_modr=tmpi-&gt;ic_body[last_start+2];
<a name="l629"></a> b2_r1=b2_modr&amp;7 +</span><span class=cF5>Bt</span><span class=cF0>(&amp;b2_rex,0)&lt;&lt;3;
<a name="l630"></a> b2_r2=b2_modr&gt;&gt;3&amp;7+</span><span class=cF5>Bt</span><span class=cF0>(&amp;b2_rex,2)&lt;&lt;3;
<a name="l631"></a> </span><span class=cF1>if</span><span class=cF0> (cnt1==3 &amp;&amp; b2_modr&amp;0xC0==0xC0) {
<a name="l632"></a> </span><span class=cF1>if</span><span class=cF0> (b2_r1==b2_r2)
<a name="l633"></a> </span><span class=cF1>goto</span><span class=cF0> move_redundant;
<a name="l634"></a> </span><span class=cF1>if</span><span class=cF0> (b1==0x89 &amp;&amp; b2==0x8B || b1==0x8B &amp;&amp; b2==0x89) </span><span class=cF7>{</span><span class=cF0>
<a name="l635"></a> </span><span class=cF1>if</span><span class=cF0> (b1_modr&amp;0xC0==0xC0) {
<a name="l636"></a> </span><span class=cF1>if</span><span class=cF0> (b1_r1==b2_r1 &amp;&amp; b1_r2==b2_r2 ||
<a name="l637"></a> b1_r1==b2_r2 &amp;&amp; b2_r1==b1_r2)
<a name="l638"></a> </span><span class=cF1>goto</span><span class=cF0> move_redundant;
<a name="l639"></a> }
<a name="l640"></a> </span><span class=cF1>if</span><span class=cF0> (b1_rex!=b2_rex)
<a name="l641"></a> </span><span class=cF1>break</span><span class=cF0>;
<a name="l642"></a> </span><span class=cF7>}</span><span class=cF0> </span><span class=cF1>else</span><span class=cF0>
<a name="l643"></a> </span><span class=cF1>break</span><span class=cF0>;
<a name="l644"></a> } </span><span class=cF1>else</span><span class=cF0> </span><span class=cF1>if</span><span class=cF0> (b1_r1==b1_r2 || </span><span class=cF7>(</span><span class=cF0>t1|t2</span><span class=cF7>)</span><span class=cF0>&amp;</span><span class=cF3>MDF_SIB</span><span class=cF0> || b1_rex!=b2_rex ||
<a name="l645"></a> !</span><span class=cF7>(</span><span class=cF0>b1==0x89 &amp;&amp; b2==0x8B || b1==0x8B &amp;&amp; b2==0x89</span><span class=cF7>)</span><span class=cF0>)
<a name="l646"></a> </span><span class=cF1>break</span><span class=cF0>;
<a name="l647"></a> </span><span class=cF7>}</span><span class=cF0>
<a name="l648"></a> </span><span class=cF1>if</span><span class=cF0> (i==cnt1) </span><span class=cF7>{</span><span class=cF0>
<a name="l649"></a>move_redundant:
<a name="l650"></a> tmpi-&gt;ic_cnt=last_start;
<a name="l651"></a> </span><span class=cF7>}</span><span class=cF0>
<a name="l652"></a> }
<a name="l653"></a> </span><span class=cF7>}</span><span class=cF0>
<a name="l654"></a> }
<a name="l655"></a> </span><span class=cF7>}</span><span class=cF0>
<a name="l656"></a> </span><span class=cF1>if</span><span class=cF0> (tmpi-&gt;ic_cnt&gt;last_start&gt;tmpi-&gt;ic_last_start)
<a name="l657"></a> tmpi-&gt;ic_last_start=last_start;
<a name="l658"></a> </span><span class=cF5>BEqu</span><span class=cF0>(&amp;tmpi-&gt;ic_flags,</span><span class=cF3>ICf_LOCK</span><span class=cF0>,old_lock);
<a name="l659"></a>}
<a name="l660"></a>
<a name="l661"></a></span><span class=cF1>U0</span><span class=cF0> </span><span class=cFD>ICLea</span><span class=cF0>(</span><span class=cF9>CIntermediateCode</span><span class=cF0> *tmpi,</span><span class=cF9>CICType</span><span class=cF0> t1,</span><span class=cF9>I64</span><span class=cF0> r1,</span><span class=cF9>I64</span><span class=cF0> d1,
<a name="l662"></a> </span><span class=cF9>CICType</span><span class=cF0> t2,</span><span class=cF9>I64</span><span class=cF0> r2,</span><span class=cF9>I64</span><span class=cF0> d2,</span><span class=cF9>CCmpCtrl</span><span class=cF0> *cc,</span><span class=cF1>U8</span><span class=cF0> *buf,</span><span class=cF9>I64</span><span class=cF0> rip)
<a name="l663"></a>{
<a name="l664"></a> </span><span class=cF9>I64</span><span class=cF0> i;
<a name="l665"></a> </span><span class=cF9>CAOTAbsAddr</span><span class=cF0> *tmpa;
<a name="l666"></a> </span><span class=cF1>switch</span><span class=cF0> (</span><span class=cF5>Bsr</span><span class=cF7>(</span><span class=cF0>t1</span><span class=cF7>)</span><span class=cF0>) </span><span class=cF7>{</span><span class=cF0>
<a name="l667"></a> </span><span class=cF1>case</span><span class=cF0> </span><span class=cF3>MDf_REG</span><span class=cF0>:
<a name="l668"></a> i=</span><span class=cFD>ICModr1</span><span class=cF0>(r1,t2,r2,d2);
<a name="l669"></a> i.u8[1]|=0x48;
<a name="l670"></a> </span><span class=cFD>ICU24</span><span class=cF0>(tmpi,i.u8[2]&lt;&lt;16+0x8D00+i.u8[1]);
<a name="l671"></a> </span><span class=cFD>ICModr2</span><span class=cF0>(tmpi,i,,d2,rip);
<a name="l672"></a> </span><span class=cF1>break</span><span class=cF0>;
<a name="l673"></a> </span><span class=cF1>case</span><span class=cF0> </span><span class=cF3>MDf_STK</span><span class=cF0>:
<a name="l674"></a> </span><span class=cF1>if</span><span class=cF0> (t2&amp;</span><span class=cF3>MDF_RIP_DISP32</span><span class=cF0>) {
<a name="l675"></a> </span><span class=cFD>ICU8</span><span class=cF0>(tmpi,0x68);
<a name="l676"></a> </span><span class=cFD>ICU32</span><span class=cF0>(tmpi,d2);
<a name="l677"></a> </span><span class=cF1>if</span><span class=cF0> (cc-&gt;flags&amp;</span><span class=cF3>CCF_AOT_COMPILE</span><span class=cF0> &amp;&amp; buf &amp;&amp; !</span><span class=cF7>(</span><span class=cF0>cc-&gt;flags&amp;</span><span class=cF3>CCF_NO_ABSS</span><span class=cF7>)</span><span class=cF0>) </span><span class=cF7>{</span><span class=cF0>
<a name="l678"></a> tmpa=</span><span class=cF5>CAlloc</span><span class=cF0>(</span><span class=cF1>sizeof</span><span class=cF7>(</span><span class=cF9>CAOTAbsAddr</span><span class=cF7>)</span><span class=cF0>);
<a name="l679"></a> tmpa-&gt;next=cc-&gt;aotc-&gt;abss;
<a name="l680"></a> tmpa-&gt;type=</span><span class=cF3>AAT_ADD_U32</span><span class=cF0>;
<a name="l681"></a> cc-&gt;aotc-&gt;abss=tmpa;
<a name="l682"></a> tmpa-&gt;rip=rip+tmpi-&gt;ic_cnt-4;
<a name="l683"></a> </span><span class=cF7>}</span><span class=cF0>
<a name="l684"></a> tmpi-&gt;ic_flags&amp;=~</span><span class=cF3>ICF_CODE_FINAL</span><span class=cF0>;
<a name="l685"></a> </span><span class=cF1>break</span><span class=cF0>;
<a name="l686"></a> } </span><span class=cF2>// Fall thru</span><span class=cF0>
<a name="l687"></a> </span><span class=cF1>default</span><span class=cF0>:
<a name="l688"></a> </span><span class=cFD>ICLea</span><span class=cF0>(tmpi,</span><span class=cF3>MDF_REG</span><span class=cF0>+</span><span class=cF3>RT_I64</span><span class=cF0>,</span><span class=cF3>REG_RCX</span><span class=cF0>,0,t2,r2,d2,cc,buf,rip);
<a name="l689"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi,t1,r1,d1,</span><span class=cF3>MDF_REG</span><span class=cF0>+</span><span class=cF3>RT_I64</span><span class=cF0>,</span><span class=cF3>REG_RCX</span><span class=cF0>,0,rip);
<a name="l690"></a> </span><span class=cF7>}</span><span class=cF0>
<a name="l691"></a>}
<a name="l692"></a>
<a name="l693"></a></span><span class=cF1>U0</span><span class=cF0> </span><span class=cFD>ICDeref</span><span class=cF0>(</span><span class=cF9>CIntermediateCode</span><span class=cF0> *tmpi,</span><span class=cF9>I64</span><span class=cF0> rip)
<a name="l694"></a>{
<a name="l695"></a> </span><span class=cF9>CICType</span><span class=cF0> t;
<a name="l696"></a> t=tmpi-&gt;res.type.raw_type;
<a name="l697"></a> </span><span class=cF1>if</span><span class=cF0> (t&gt;tmpi-&gt;arg1_type_pointed_to)
<a name="l698"></a> t=tmpi-&gt;arg1_type_pointed_to;
<a name="l699"></a> </span><span class=cF1>if</span><span class=cF0> (tmpi-&gt;arg1.type&amp;</span><span class=cF3>MDF_REG</span><span class=cF0>)
<a name="l700"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi,tmpi-&gt;res.type,tmpi-&gt;res.</span><span class=cF1>reg</span><span class=cF0>,tmpi-&gt;res.disp,
<a name="l701"></a> </span><span class=cF3>MDF_DISP</span><span class=cF0>+t,tmpi-&gt;arg1.</span><span class=cF1>reg</span><span class=cF0>,tmpi-&gt;arg1.disp,rip);
<a name="l702"></a> </span><span class=cF1>else</span><span class=cF0> </span><span class=cF7>{</span><span class=cF0>
<a name="l703"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi,</span><span class=cF3>MDF_REG</span><span class=cF0>+</span><span class=cF3>RT_I64</span><span class=cF0>,</span><span class=cF3>REG_RCX</span><span class=cF0>,0,
<a name="l704"></a> tmpi-&gt;arg1.type,tmpi-&gt;arg1.</span><span class=cF1>reg</span><span class=cF0>,tmpi-&gt;arg1.disp,rip);
<a name="l705"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi,tmpi-&gt;res.type,tmpi-&gt;res.</span><span class=cF1>reg</span><span class=cF0>,tmpi-&gt;res.disp,
<a name="l706"></a> </span><span class=cF3>MDF_DISP</span><span class=cF0>+t,</span><span class=cF3>REG_RCX</span><span class=cF0>,0,rip);
<a name="l707"></a> </span><span class=cF7>}</span><span class=cF0>
<a name="l708"></a>}
</span></pre></body>
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