663 lines
88 KiB
Plaintext
663 lines
88 KiB
Plaintext
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<!DOCTYPE html>
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<html lang="en">
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<head>
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<meta charset="UTF-8">
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<meta name="generator" content="TempleOS V5.03">
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<meta name="viewport" content="width=device-width">
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<link rel="stylesheet" href="/style/templeos.css">
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<script src="/script/templeos.js"></script>
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<style type="text/css">
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.cF0{color:#000000;background-color:#ffffff;}
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.cF1{color:#0000aa;background-color:#ffffff;}
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.cF6{color:#aa5500;background-color:#ffffff;}
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.cF7{color:#aaaaaa;background-color:#ffffff;}
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.cF8{color:#555555;background-color:#ffffff;}
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.cF9{color:#5555ff;background-color:#ffffff;}
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.cFA{color:#55ff55;background-color:#ffffff;}
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.cFB{color:#55ffff;background-color:#ffffff;}
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.cFC{color:#ff5555;background-color:#ffffff;}
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.cFD{color:#ff55ff;background-color:#ffffff;}
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.cFE{color:#ffff55;background-color:#ffffff;}
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.cFF{color:#ffffff;background-color:#ffffff;}
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</style>
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</head>
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<body>
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<pre id="content">
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<a name="l1"></a><span class=cF1>U0</span><span class=cF0> </span><span class=cFD>ICFOpEqu</span><span class=cF0>(</span><span class=cF9>CCmpCtrl</span><span class=cF0> *cc,</span><span class=cF9>CIntermediateCode</span><span class=cF0> *tmpi,</span><span class=cF9>I64</span><span class=cF0> op,</span><span class=cF1>U8</span><span class=cF0> *buf2,</span><span class=cF9>I64</span><span class=cF0> rip)
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<a name="l2"></a>{</span><span class=cF2>//for ADD,SUB,DIV,MUL</span><span class=cF0>
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<a name="l3"></a> </span><span class=cF9>CICArg</span><span class=cF0> *arg1=&tmpi->arg1,
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<a name="l4"></a> *arg2=&tmpi->arg2;
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<a name="l5"></a> </span><span class=cF1>Bool</span><span class=cF0> dont_push_float,dont_pop_float,p1_mem;
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<a name="l6"></a> </span><span class=cF9>I64</span><span class=cF0> rsp_size=0,builtin2=0,
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<a name="l7"></a> t1,r1,d1,t2,r2,d2;
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<a name="l8"></a>
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<a name="l9"></a> </span><span class=cF1>if</span><span class=cF0> (cc->flags&</span><span class=cF3>CCF_AOT_COMPILE</span><span class=cF0>)
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<a name="l10"></a> buf2=cc->aotc->rip;
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<a name="l11"></a>
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<a name="l12"></a> </span><span class=cFD>CmpSetFloatOpPushPop</span><span class=cF0>(cc,tmpi,&dont_push_float,&dont_pop_float);
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<a name="l13"></a> </span><span class=cF1>if</span><span class=cF0> (dont_pop_float)
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<a name="l14"></a> </span><span class=cF5>throw</span><span class=cF0>(</span><span class=cF6>'Compiler'</span><span class=cF0>);
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<a name="l15"></a>
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<a name="l16"></a> </span><span class=cF1>if</span><span class=cF0> (tmpi->ic_flags & </span><span class=cF3>ICF_BY_VAL</span><span class=cF0>) </span><span class=cF7>{</span><span class=cF0>
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<a name="l17"></a> p1_mem=</span><span class=cF3>FALSE</span><span class=cF0>;
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<a name="l18"></a> </span><span class=cF1>if</span><span class=cF0> (dont_push_float) {
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<a name="l19"></a> </span><span class=cF1>if</span><span class=cF0> (tmpi->arg1_type_pointed_to!=</span><span class=cF3>RT_F64</span><span class=cF0>) </span><span class=cF7>{</span><span class=cF0>
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<a name="l20"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi,</span><span class=cF3>MDF_REG</span><span class=cF0>+</span><span class=cF3>RT_I64</span><span class=cF0>,</span><span class=cF3>REG_RAX</span><span class=cF0>,0,
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<a name="l21"></a> arg1->type&</span><span class=cF3>MDG_MASK</span><span class=cF0>+tmpi->arg1_type_pointed_to,
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<a name="l22"></a> arg1-></span><span class=cF1>reg</span><span class=cF0>,arg1->disp,rip);
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<a name="l23"></a> </span><span class=cFD>ICFCvt2</span><span class=cF0>(cc,tmpi,</span><span class=cF3>REG_RAX</span><span class=cF0>,</span><span class=cF3>MDF_REG</span><span class=cF0>+</span><span class=cF3>RT_I64</span><span class=cF0>,</span><span class=cF3>REG_RAX</span><span class=cF0>,0,</span><span class=cF3>FALSE</span><span class=cF0>,rip);
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<a name="l24"></a> </span><span class=cFD>ICPush</span><span class=cF0>(tmpi,</span><span class=cF3>MDF_REG</span><span class=cF0>+</span><span class=cF3>RT_I64</span><span class=cF0>,</span><span class=cF3>REG_RAX</span><span class=cF0>,0,rip);
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<a name="l25"></a> t1=</span><span class=cF3>MDF_SIB</span><span class=cF0>+</span><span class=cF3>RT_I64</span><span class=cF0>; r1=</span><span class=cF3>REG_RSP</span><span class=cF0>+</span><span class=cF3>REG_RSP</span><span class=cF0><<8; d1=0;
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<a name="l26"></a> rsp_size+=8;
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<a name="l27"></a> </span><span class=cF7>}</span><span class=cF0> </span><span class=cF1>else</span><span class=cF0> </span><span class=cF7>{</span><span class=cF0>
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<a name="l28"></a> </span><span class=cF1>if</span><span class=cF0> (tmpi->arg1_type_pointed_to>=</span><span class=cF3>RT_I64</span><span class=cF0> && arg1->type&</span><span class=cF3>MDG_DISP_SIB_RIP</span><span class=cF0>) {
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<a name="l29"></a> t1=arg1->type&</span><span class=cF3>MDG_MASK</span><span class=cF0>+tmpi->arg1_type_pointed_to;
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<a name="l30"></a> r1=arg1-></span><span class=cF1>reg</span><span class=cF0>;
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<a name="l31"></a> d1=arg1->disp;
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<a name="l32"></a> p1_mem=</span><span class=cF3>TRUE</span><span class=cF0>;
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<a name="l33"></a> } </span><span class=cF1>else</span><span class=cF0> {
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<a name="l34"></a> </span><span class=cFD>ICPush</span><span class=cF0>(tmpi,arg1->type&</span><span class=cF3>MDG_MASK</span><span class=cF0>+tmpi->arg1_type_pointed_to,
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<a name="l35"></a> arg1-></span><span class=cF1>reg</span><span class=cF0>,arg1->disp,rip);
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<a name="l36"></a> t1=</span><span class=cF3>MDF_SIB</span><span class=cF0>+</span><span class=cF3>RT_I64</span><span class=cF0>; r1=</span><span class=cF3>REG_RSP</span><span class=cF0>+</span><span class=cF3>REG_RSP</span><span class=cF0><<8; d1=0;
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<a name="l37"></a> rsp_size+=8;
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<a name="l38"></a> }
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<a name="l39"></a> </span><span class=cF7>}</span><span class=cF0>
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<a name="l40"></a> } </span><span class=cF1>else</span><span class=cF0> {
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<a name="l41"></a> </span><span class=cF1>if</span><span class=cF0> (tmpi->arg1_type_pointed_to!=</span><span class=cF3>RT_F64</span><span class=cF0> || arg1->type&</span><span class=cF3>MDF_STK</span><span class=cF0>) </span><span class=cF7>{</span><span class=cF0>
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<a name="l42"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi,</span><span class=cF3>MDF_REG</span><span class=cF0>+</span><span class=cF3>RT_I64</span><span class=cF0>,</span><span class=cF3>REG_RAX</span><span class=cF0>,0,arg2->type,
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<a name="l43"></a> arg2-></span><span class=cF1>reg</span><span class=cF0>,arg2->disp,rip);
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<a name="l44"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi,</span><span class=cF3>MDF_REG</span><span class=cF0>+</span><span class=cF3>RT_I64</span><span class=cF0>,</span><span class=cF3>REG_RDX</span><span class=cF0>,0,
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<a name="l45"></a> arg1->type&</span><span class=cF3>MDG_MASK</span><span class=cF0>+tmpi->arg1_type_pointed_to,
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<a name="l46"></a> arg1-></span><span class=cF1>reg</span><span class=cF0>,arg1->disp,rip);
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<a name="l47"></a> </span><span class=cF1>if</span><span class=cF0> (tmpi->arg1_type_pointed_to!=</span><span class=cF3>RT_F64</span><span class=cF0>)
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<a name="l48"></a> </span><span class=cFD>ICFCvt2</span><span class=cF0>(cc,tmpi,</span><span class=cF3>REG_RDX</span><span class=cF0>,</span><span class=cF3>MDF_REG</span><span class=cF0>+</span><span class=cF3>RT_I64</span><span class=cF0>,</span><span class=cF3>REG_RDX</span><span class=cF0>,0,</span><span class=cF3>FALSE</span><span class=cF0>,rip);
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<a name="l49"></a> </span><span class=cFD>ICU16</span><span class=cF0>(tmpi,0x5052); </span><span class=cF2>//PUSH EDX PUSH EAX</span><span class=cF0>
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<a name="l50"></a> rsp_size=16;
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<a name="l51"></a> t1=</span><span class=cF3>MDF_SIB</span><span class=cF0>+</span><span class=cF3>RT_I64</span><span class=cF0>; r1=</span><span class=cF3>REG_RSP</span><span class=cF0>+</span><span class=cF3>REG_RSP</span><span class=cF0><<8; d1=8;
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<a name="l52"></a> t2=</span><span class=cF3>MDF_SIB</span><span class=cF0>+</span><span class=cF3>RT_I64</span><span class=cF0>; r2=</span><span class=cF3>REG_RSP</span><span class=cF0>+</span><span class=cF3>REG_RSP</span><span class=cF0><<8; d2=0;
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<a name="l53"></a> </span><span class=cF7>}</span><span class=cF0> </span><span class=cF1>else</span><span class=cF0> </span><span class=cF7>{</span><span class=cF0>
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<a name="l54"></a> </span><span class=cF1>if</span><span class=cF0> (arg2->type.raw_type>=</span><span class=cF3>RT_I64</span><span class=cF0> && arg2->type&</span><span class=cF3>MDG_DISP_SIB_RIP</span><span class=cF0>) {
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<a name="l55"></a> t2=arg2->type;
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<a name="l56"></a> r2=arg2-></span><span class=cF1>reg</span><span class=cF0>;
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<a name="l57"></a> d2=arg2->disp;
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<a name="l58"></a> } </span><span class=cF1>else</span><span class=cF0> {
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<a name="l59"></a> </span><span class=cF1>if</span><span class=cF0> (arg2->type&</span><span class=cF3>MDF_IMM</span><span class=cF0>) </span><span class=cF7>{</span><span class=cF0>
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<a name="l60"></a> </span><span class=cF1>if</span><span class=cF0> (!</span><span class=cF7>(</span><span class=cF0>builtin2=</span><span class=cFD>ICBuiltInFloatConst</span><span class=cF0>(arg2->disp</span><span class=cF7>(</span><span class=cF1>F64</span><span class=cF7>)</span><span class=cF0>)</span><span class=cF7>)</span><span class=cF0>) {
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<a name="l61"></a> t2=</span><span class=cF3>MDF_RIP_DISP32</span><span class=cF0>+</span><span class=cF3>RT_I64</span><span class=cF0>;
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<a name="l62"></a> r2=</span><span class=cF3>REG_RIP</span><span class=cF0>;
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<a name="l63"></a> d2=</span><span class=cFD>COCFloatConstFind</span><span class=cF0>(cc,arg2->disp</span><span class=cF7>(</span><span class=cF1>F64</span><span class=cF7>)</span><span class=cF0>)+buf2;
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<a name="l64"></a> }
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<a name="l65"></a> </span><span class=cF7>}</span><span class=cF0> </span><span class=cF1>else</span><span class=cF0> </span><span class=cF7>{</span><span class=cF0>
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<a name="l66"></a> </span><span class=cFD>ICPush</span><span class=cF0>(tmpi,arg2->type,arg2-></span><span class=cF1>reg</span><span class=cF0>,arg2->disp,rip);
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<a name="l67"></a> t2=</span><span class=cF3>MDF_SIB</span><span class=cF0>+</span><span class=cF3>RT_I64</span><span class=cF0>; r2=</span><span class=cF3>REG_RSP</span><span class=cF0>+</span><span class=cF3>REG_RSP</span><span class=cF0><<8; d2=0;
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<a name="l68"></a> rsp_size+=8;
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<a name="l69"></a> </span><span class=cF7>}</span><span class=cF0>
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<a name="l70"></a> }
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<a name="l71"></a> </span><span class=cF1>if</span><span class=cF0> (tmpi->arg1_type_pointed_to>=</span><span class=cF3>RT_I64</span><span class=cF0> && arg1->type&</span><span class=cF3>MDG_DISP_SIB_RIP</span><span class=cF0>) {
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<a name="l72"></a> t1=arg1->type&</span><span class=cF3>MDG_MASK</span><span class=cF0>+tmpi->arg1_type_pointed_to;
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<a name="l73"></a> r1=arg1-></span><span class=cF1>reg</span><span class=cF0>;
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<a name="l74"></a> d1=arg1->disp;
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<a name="l75"></a> p1_mem=</span><span class=cF3>TRUE</span><span class=cF0>;
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<a name="l76"></a> } </span><span class=cF1>else</span><span class=cF0> {
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<a name="l77"></a> </span><span class=cFD>ICPush</span><span class=cF0>(tmpi,arg1->type&</span><span class=cF3>MDG_MASK</span><span class=cF0>+tmpi->arg1_type_pointed_to,
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<a name="l78"></a> arg1-></span><span class=cF1>reg</span><span class=cF0>,arg1->disp,rip);
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<a name="l79"></a> t1=</span><span class=cF3>MDF_SIB</span><span class=cF0>+</span><span class=cF3>RT_I64</span><span class=cF0>; r1=</span><span class=cF3>REG_RSP</span><span class=cF0>+</span><span class=cF3>REG_RSP</span><span class=cF0><<8; d1=0;
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<a name="l80"></a> rsp_size+=8;
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<a name="l81"></a> </span><span class=cF1>if</span><span class=cF0> (r2==</span><span class=cF3>REG_RSP</span><span class=cF0>+</span><span class=cF3>REG_RSP</span><span class=cF0><<8)
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<a name="l82"></a> d2+=8;
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<a name="l83"></a> }
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<a name="l84"></a> </span><span class=cF7>}</span><span class=cF0>
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<a name="l85"></a> }
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<a name="l86"></a> </span><span class=cF1>if</span><span class=cF0> (!rsp_size && !</span><span class=cF7>(</span><span class=cF0>p1_mem && tmpi->arg1_type_pointed_to==</span><span class=cF3>RT_F64</span><span class=cF7>)</span><span class=cF0>) {
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<a name="l87"></a> rsp_size=8;
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<a name="l88"></a> </span><span class=cFD>ICAddRSP</span><span class=cF0>(tmpi,-8);
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<a name="l89"></a> }
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<a name="l90"></a> </span><span class=cF1>if</span><span class=cF0> (!dont_push_float) {
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<a name="l91"></a> </span><span class=cF1>if</span><span class=cF0> (builtin2)
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<a name="l92"></a> </span><span class=cFD>ICU16</span><span class=cF0>(tmpi,builtin2);
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<a name="l93"></a> </span><span class=cF1>else</span><span class=cF0>
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<a name="l94"></a> </span><span class=cFD>ICSlashOp</span><span class=cF0>(tmpi,t2,r2,d2,SLASH_OP_FLD,rip);
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<a name="l95"></a> }
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<a name="l96"></a> </span><span class=cF1>switch</span><span class=cF0> (op.u8[0]) {
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<a name="l97"></a> </span><span class=cF1>case</span><span class=cF0> 4: op=SLASH_OP_FSUBR; </span><span class=cF1>break</span><span class=cF0>;
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<a name="l98"></a> </span><span class=cF1>case</span><span class=cF0> 6: op=SLASH_OP_FDIVR; </span><span class=cF1>break</span><span class=cF0>;
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<a name="l99"></a> }
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<a name="l100"></a> </span><span class=cFD>ICSlashOp</span><span class=cF0>(tmpi,t1,r1,d1,op,rip);
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<a name="l101"></a> </span><span class=cFD>CmpNoteFloatOp</span><span class=cF0>(cc,tmpi,</span><span class=cF3>TRUE</span><span class=cF0>,</span><span class=cF3>FALSE</span><span class=cF0>,CN_INST);
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<a name="l102"></a> </span><span class=cF1>if</span><span class=cF0> (p1_mem && tmpi->arg1_type_pointed_to==</span><span class=cF3>RT_F64</span><span class=cF0>) {
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<a name="l103"></a> </span><span class=cFD>ICSlashOp</span><span class=cF0>(tmpi,t1,r1,d1,SLASH_OP_FSTP,rip);
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<a name="l104"></a> </span><span class=cF1>if</span><span class=cF0> (rsp_size)
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<a name="l105"></a> </span><span class=cFD>ICAddRSP</span><span class=cF0>(tmpi,rsp_size);
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<a name="l106"></a> } </span><span class=cF1>else</span><span class=cF0> {
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<a name="l107"></a> </span><span class=cF1>if</span><span class=cF0> (rsp_size==8)
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|
|
<a name="l108"></a> </span><span class=cFD>ICSlashOp</span><span class=cF0>(tmpi,</span><span class=cF3>MDF_SIB</span><span class=cF0>+</span><span class=cF3>RT_I64</span><span class=cF0>,</span><span class=cF3>REG_RSP</span><span class=cF0>+</span><span class=cF3>REG_RSP</span><span class=cF0><<8,0,SLASH_OP_FSTP,rip);
|
||
|
|
<a name="l109"></a> </span><span class=cF1>else</span><span class=cF0> </span><span class=cF1>if</span><span class=cF0> (rsp_size>8) </span><span class=cF7>{</span><span class=cF0>
|
||
|
|
<a name="l110"></a> </span><span class=cFD>ICSlashOp</span><span class=cF0>(tmpi,</span><span class=cF3>MDF_SIB</span><span class=cF0>+</span><span class=cF3>RT_I64</span><span class=cF0>,</span><span class=cF3>REG_RSP</span><span class=cF0>+</span><span class=cF3>REG_RSP</span><span class=cF0><<8,rsp_size-8,
|
||
|
|
<a name="l111"></a> SLASH_OP_FSTP,rip);
|
||
|
|
<a name="l112"></a> </span><span class=cFD>ICAddRSP</span><span class=cF0>(tmpi,rsp_size-8);
|
||
|
|
<a name="l113"></a> </span><span class=cF7>}</span><span class=cF0>
|
||
|
|
<a name="l114"></a> </span><span class=cF1>if</span><span class=cF0> (tmpi->arg1_type_pointed_to!=</span><span class=cF3>RT_F64</span><span class=cF0>) </span><span class=cF7>{</span><span class=cF0>
|
||
|
|
<a name="l115"></a> </span><span class=cFD>ICPop</span><span class=cF0>(tmpi,</span><span class=cF3>MDF_REG</span><span class=cF0>+</span><span class=cF3>RT_I64</span><span class=cF0>,</span><span class=cF3>REG_RAX</span><span class=cF0>,0,rip);
|
||
|
|
<a name="l116"></a> </span><span class=cFD>ICFCvt2</span><span class=cF0>(cc,tmpi,</span><span class=cF3>REG_RAX</span><span class=cF0>,</span><span class=cF3>MDF_REG</span><span class=cF0>+</span><span class=cF3>RT_I64</span><span class=cF0>,</span><span class=cF3>REG_RAX</span><span class=cF0>,0,</span><span class=cF3>TRUE</span><span class=cF0>,rip);
|
||
|
|
<a name="l117"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi,arg1->type&</span><span class=cF3>MDG_MASK</span><span class=cF0>+tmpi->arg1_type_pointed_to,arg1-></span><span class=cF1>reg</span><span class=cF0>,
|
||
|
|
<a name="l118"></a> arg1->disp,</span><span class=cF3>MDF_REG</span><span class=cF0>+</span><span class=cF3>RT_I64</span><span class=cF0>,</span><span class=cF3>REG_RAX</span><span class=cF0>,0,rip);
|
||
|
|
<a name="l119"></a> </span><span class=cF7>}</span><span class=cF0> </span><span class=cF1>else</span><span class=cF0>
|
||
|
|
<a name="l120"></a> </span><span class=cFD>ICPop</span><span class=cF0>(tmpi,arg1->type&</span><span class=cF3>MDG_MASK</span><span class=cF0>+tmpi->arg1_type_pointed_to,
|
||
|
|
<a name="l121"></a> arg1-></span><span class=cF1>reg</span><span class=cF0>,arg1->disp,rip);
|
||
|
|
<a name="l122"></a> }
|
||
|
|
<a name="l123"></a> </span><span class=cF1>if</span><span class=cF0> (tmpi->res.type.mode)
|
||
|
|
<a name="l124"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi,tmpi->res.type,tmpi->res.</span><span class=cF1>reg</span><span class=cF0>,tmpi->res.disp,
|
||
|
|
<a name="l125"></a> arg1->type&</span><span class=cF3>MDG_MASK</span><span class=cF0>+tmpi->arg1_type_pointed_to,
|
||
|
|
<a name="l126"></a> arg1-></span><span class=cF1>reg</span><span class=cF0>,arg1->disp,rip);
|
||
|
|
<a name="l127"></a> </span><span class=cF7>}</span><span class=cF0> </span><span class=cF1>else</span><span class=cF0> </span><span class=cF7>{</span><span class=cF0>
|
||
|
|
<a name="l128"></a> </span><span class=cF1>if</span><span class=cF0> (tmpi->arg1_type_pointed_to>=</span><span class=cF3>RT_I64</span><span class=cF0>)
|
||
|
|
<a name="l129"></a> p1_mem=</span><span class=cF3>TRUE</span><span class=cF0>;
|
||
|
|
<a name="l130"></a> </span><span class=cF1>else</span><span class=cF0>
|
||
|
|
<a name="l131"></a> p1_mem=</span><span class=cF3>FALSE</span><span class=cF0>;
|
||
|
|
<a name="l132"></a> </span><span class=cF1>if</span><span class=cF0> (dont_push_float) {
|
||
|
|
<a name="l133"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi,</span><span class=cF3>MDF_REG</span><span class=cF0>+</span><span class=cF3>RT_I64</span><span class=cF0>,</span><span class=cF3>REG_RCX</span><span class=cF0>,0,arg1->type,arg1-></span><span class=cF1>reg</span><span class=cF0>,arg1->disp,rip);
|
||
|
|
<a name="l134"></a> </span><span class=cF1>if</span><span class=cF0> (tmpi->arg1_type_pointed_to!=</span><span class=cF3>RT_F64</span><span class=cF0>) </span><span class=cF7>{</span><span class=cF0>
|
||
|
|
<a name="l135"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi,</span><span class=cF3>MDF_REG</span><span class=cF0>+</span><span class=cF3>RT_I64</span><span class=cF0>,</span><span class=cF3>REG_RAX</span><span class=cF0>,0,
|
||
|
|
<a name="l136"></a> </span><span class=cF3>MDF_DISP</span><span class=cF0>+tmpi->arg1_type_pointed_to,</span><span class=cF3>REG_RCX</span><span class=cF0>,0,rip);
|
||
|
|
<a name="l137"></a> </span><span class=cFD>ICFCvt2</span><span class=cF0>(cc,tmpi,</span><span class=cF3>REG_RAX</span><span class=cF0>,</span><span class=cF3>MDF_REG</span><span class=cF0>+</span><span class=cF3>RT_I64</span><span class=cF0>,</span><span class=cF3>REG_RAX</span><span class=cF0>,0,</span><span class=cF3>FALSE</span><span class=cF0>,rip);
|
||
|
|
<a name="l138"></a> </span><span class=cFD>ICPush</span><span class=cF0>(tmpi,</span><span class=cF3>MDF_REG</span><span class=cF0>+</span><span class=cF3>RT_I64</span><span class=cF0>,</span><span class=cF3>REG_RAX</span><span class=cF0>,0,rip);
|
||
|
|
<a name="l139"></a> </span><span class=cF7>}</span><span class=cF0> </span><span class=cF1>else</span><span class=cF0>
|
||
|
|
<a name="l140"></a> </span><span class=cFD>ICPush</span><span class=cF0>(tmpi,</span><span class=cF3>MDF_DISP</span><span class=cF0>+tmpi->arg1_type_pointed_to,</span><span class=cF3>REG_RCX</span><span class=cF0>,0,rip);
|
||
|
|
<a name="l141"></a> t1=</span><span class=cF3>MDF_SIB</span><span class=cF0>+</span><span class=cF3>RT_I64</span><span class=cF0>; r1=</span><span class=cF3>REG_RSP</span><span class=cF0>+</span><span class=cF3>REG_RSP</span><span class=cF0><<8; d1=0;
|
||
|
|
<a name="l142"></a> rsp_size+=8;
|
||
|
|
<a name="l143"></a> } </span><span class=cF1>else</span><span class=cF0> {
|
||
|
|
<a name="l144"></a> </span><span class=cF1>if</span><span class=cF0> (tmpi->arg1_type_pointed_to!=</span><span class=cF3>RT_F64</span><span class=cF0> || arg1->type&</span><span class=cF3>MDF_STK</span><span class=cF0>) </span><span class=cF7>{</span><span class=cF0>
|
||
|
|
<a name="l145"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi,</span><span class=cF3>MDF_REG</span><span class=cF0>+</span><span class=cF3>RT_I64</span><span class=cF0>,</span><span class=cF3>REG_RAX</span><span class=cF0>,0,arg2->type,
|
||
|
|
<a name="l146"></a> arg2-></span><span class=cF1>reg</span><span class=cF0>,arg2->disp,rip);
|
||
|
|
<a name="l147"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi,</span><span class=cF3>MDF_REG</span><span class=cF0>+</span><span class=cF3>RT_I64</span><span class=cF0>,</span><span class=cF3>REG_RCX</span><span class=cF0>,0,arg1->type,
|
||
|
|
<a name="l148"></a> arg1-></span><span class=cF1>reg</span><span class=cF0>,arg1->disp,rip);
|
||
|
|
<a name="l149"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi,</span><span class=cF3>MDF_REG</span><span class=cF0>+</span><span class=cF3>RT_I64</span><span class=cF0>,</span><span class=cF3>REG_RDX</span><span class=cF0>,0,
|
||
|
|
<a name="l150"></a> </span><span class=cF3>MDF_DISP</span><span class=cF0>+tmpi->arg1_type_pointed_to,</span><span class=cF3>REG_RCX</span><span class=cF0>,0,rip);
|
||
|
|
<a name="l151"></a> </span><span class=cF1>if</span><span class=cF0> (tmpi->arg1_type_pointed_to!=</span><span class=cF3>RT_F64</span><span class=cF0>)
|
||
|
|
<a name="l152"></a> </span><span class=cFD>ICFCvt2</span><span class=cF0>(cc,tmpi,</span><span class=cF3>REG_RDX</span><span class=cF0>,</span><span class=cF3>MDF_REG</span><span class=cF0>+</span><span class=cF3>RT_I64</span><span class=cF0>,</span><span class=cF3>REG_RDX</span><span class=cF0>,0,</span><span class=cF3>FALSE</span><span class=cF0>,rip);
|
||
|
|
<a name="l153"></a> </span><span class=cFD>ICU16</span><span class=cF0>(tmpi,0x5052); </span><span class=cF2>//PUSH EDX PUSH EAX</span><span class=cF0>
|
||
|
|
<a name="l154"></a> rsp_size=16;
|
||
|
|
<a name="l155"></a> t1=</span><span class=cF3>MDF_SIB</span><span class=cF0>+</span><span class=cF3>RT_I64</span><span class=cF0>; r1=</span><span class=cF3>REG_RSP</span><span class=cF0>+</span><span class=cF3>REG_RSP</span><span class=cF0><<8; d1=8;
|
||
|
|
<a name="l156"></a> t2=</span><span class=cF3>MDF_SIB</span><span class=cF0>+</span><span class=cF3>RT_I64</span><span class=cF0>; r2=</span><span class=cF3>REG_RSP</span><span class=cF0>+</span><span class=cF3>REG_RSP</span><span class=cF0><<8; d2=0;
|
||
|
|
<a name="l157"></a> </span><span class=cF7>}</span><span class=cF0> </span><span class=cF1>else</span><span class=cF0> </span><span class=cF7>{</span><span class=cF0>
|
||
|
|
<a name="l158"></a> </span><span class=cF1>if</span><span class=cF0> (arg2->type.raw_type>=</span><span class=cF3>RT_I64</span><span class=cF0> && arg2->type&</span><span class=cF3>MDG_DISP_SIB_RIP</span><span class=cF0>) {
|
||
|
|
<a name="l159"></a> t2=arg2->type;
|
||
|
|
<a name="l160"></a> r2=arg2-></span><span class=cF1>reg</span><span class=cF0>;
|
||
|
|
<a name="l161"></a> d2=arg2->disp;
|
||
|
|
<a name="l162"></a> } </span><span class=cF1>else</span><span class=cF0> {
|
||
|
|
<a name="l163"></a> </span><span class=cF1>if</span><span class=cF0> (arg2->type&</span><span class=cF3>MDF_IMM</span><span class=cF0>) </span><span class=cF7>{</span><span class=cF0>
|
||
|
|
<a name="l164"></a> </span><span class=cF1>if</span><span class=cF0> (!</span><span class=cF7>(</span><span class=cF0>builtin2=</span><span class=cFD>ICBuiltInFloatConst</span><span class=cF0>(arg2->disp</span><span class=cF7>(</span><span class=cF1>F64</span><span class=cF7>)</span><span class=cF0>)</span><span class=cF7>)</span><span class=cF0>) {
|
||
|
|
<a name="l165"></a> t2=</span><span class=cF3>MDF_RIP_DISP32</span><span class=cF0>+</span><span class=cF3>RT_I64</span><span class=cF0>;
|
||
|
|
<a name="l166"></a> r2=</span><span class=cF3>REG_RIP</span><span class=cF0>;
|
||
|
|
<a name="l167"></a> d2=</span><span class=cFD>COCFloatConstFind</span><span class=cF0>(cc,arg2->disp</span><span class=cF7>(</span><span class=cF1>F64</span><span class=cF7>)</span><span class=cF0>)+buf2;
|
||
|
|
<a name="l168"></a> }
|
||
|
|
<a name="l169"></a> </span><span class=cF7>}</span><span class=cF0> </span><span class=cF1>else</span><span class=cF0> </span><span class=cF7>{</span><span class=cF0>
|
||
|
|
<a name="l170"></a> </span><span class=cFD>ICPush</span><span class=cF0>(tmpi,arg2->type,arg2-></span><span class=cF1>reg</span><span class=cF0>,arg2->disp,rip);
|
||
|
|
<a name="l171"></a> t2=</span><span class=cF3>MDF_SIB</span><span class=cF0>+</span><span class=cF3>RT_I64</span><span class=cF0>; r2=</span><span class=cF3>REG_RSP</span><span class=cF0>+</span><span class=cF3>REG_RSP</span><span class=cF0><<8; d2=0;
|
||
|
|
<a name="l172"></a> rsp_size+=8;
|
||
|
|
<a name="l173"></a> </span><span class=cF7>}</span><span class=cF0>
|
||
|
|
<a name="l174"></a> }
|
||
|
|
<a name="l175"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi,</span><span class=cF3>MDF_REG</span><span class=cF0>+</span><span class=cF3>RT_I64</span><span class=cF0>,</span><span class=cF3>REG_RCX</span><span class=cF0>,0,arg1->type,
|
||
|
|
<a name="l176"></a> arg1-></span><span class=cF1>reg</span><span class=cF0>,arg1->disp,rip);
|
||
|
|
<a name="l177"></a> </span><span class=cFD>ICPush</span><span class=cF0>(tmpi,</span><span class=cF3>MDF_DISP</span><span class=cF0>+tmpi->arg1_type_pointed_to,</span><span class=cF3>REG_RCX</span><span class=cF0>,0,rip);
|
||
|
|
<a name="l178"></a> t1=</span><span class=cF3>MDF_SIB</span><span class=cF0>+</span><span class=cF3>RT_I64</span><span class=cF0>; r1=</span><span class=cF3>REG_RSP</span><span class=cF0>+</span><span class=cF3>REG_RSP</span><span class=cF0><<8; d1=0;
|
||
|
|
<a name="l179"></a> rsp_size+=8;
|
||
|
|
<a name="l180"></a> </span><span class=cF1>if</span><span class=cF0> (r2==</span><span class=cF3>REG_RSP</span><span class=cF0>+</span><span class=cF3>REG_RSP</span><span class=cF0><<8)
|
||
|
|
<a name="l181"></a> d2+=8;
|
||
|
|
<a name="l182"></a> </span><span class=cF7>}</span><span class=cF0>
|
||
|
|
<a name="l183"></a> }
|
||
|
|
<a name="l184"></a> </span><span class=cF1>if</span><span class=cF0> (!rsp_size && !</span><span class=cF7>(</span><span class=cF0>p1_mem && tmpi->arg1_type_pointed_to==</span><span class=cF3>RT_F64</span><span class=cF7>)</span><span class=cF0>) {
|
||
|
|
<a name="l185"></a> rsp_size=8;
|
||
|
|
<a name="l186"></a> </span><span class=cFD>ICAddRSP</span><span class=cF0>(tmpi,-8);
|
||
|
|
<a name="l187"></a> }
|
||
|
|
<a name="l188"></a> </span><span class=cF1>if</span><span class=cF0> (!dont_push_float) {
|
||
|
|
<a name="l189"></a> </span><span class=cF1>if</span><span class=cF0> (builtin2)
|
||
|
|
<a name="l190"></a> </span><span class=cFD>ICU16</span><span class=cF0>(tmpi,builtin2);
|
||
|
|
<a name="l191"></a> </span><span class=cF1>else</span><span class=cF0>
|
||
|
|
<a name="l192"></a> </span><span class=cFD>ICSlashOp</span><span class=cF0>(tmpi,t2,r2,d2,SLASH_OP_FLD,rip);
|
||
|
|
<a name="l193"></a> }
|
||
|
|
<a name="l194"></a>
|
||
|
|
<a name="l195"></a> </span><span class=cF1>switch</span><span class=cF0> (op.u8[0]) {
|
||
|
|
<a name="l196"></a> </span><span class=cF1>case</span><span class=cF0> 4: op=SLASH_OP_FSUBR; </span><span class=cF1>break</span><span class=cF0>;
|
||
|
|
<a name="l197"></a> </span><span class=cF1>case</span><span class=cF0> 6: op=SLASH_OP_FDIVR; </span><span class=cF1>break</span><span class=cF0>;
|
||
|
|
<a name="l198"></a> }
|
||
|
|
<a name="l199"></a> </span><span class=cFD>ICSlashOp</span><span class=cF0>(tmpi,t1,r1,d1,op,rip);
|
||
|
|
<a name="l200"></a> </span><span class=cFD>CmpNoteFloatOp</span><span class=cF0>(cc,tmpi,</span><span class=cF3>TRUE</span><span class=cF0>,</span><span class=cF3>FALSE</span><span class=cF0>,CN_INST);
|
||
|
|
<a name="l201"></a> </span><span class=cF1>if</span><span class=cF0> (p1_mem && tmpi->arg1_type_pointed_to==</span><span class=cF3>RT_F64</span><span class=cF0>) {
|
||
|
|
<a name="l202"></a> </span><span class=cFD>ICSlashOp</span><span class=cF0>(tmpi,</span><span class=cF3>MDF_DISP</span><span class=cF0>+tmpi->arg1_type_pointed_to,
|
||
|
|
<a name="l203"></a> </span><span class=cF3>REG_RCX</span><span class=cF0>,0,SLASH_OP_FSTP,rip);
|
||
|
|
<a name="l204"></a> </span><span class=cF1>if</span><span class=cF0> (rsp_size)
|
||
|
|
<a name="l205"></a> </span><span class=cFD>ICAddRSP</span><span class=cF0>(tmpi,rsp_size);
|
||
|
|
<a name="l206"></a> } </span><span class=cF1>else</span><span class=cF0> {
|
||
|
|
<a name="l207"></a> </span><span class=cF1>if</span><span class=cF0> (rsp_size==8)
|
||
|
|
<a name="l208"></a> </span><span class=cFD>ICSlashOp</span><span class=cF0>(tmpi,</span><span class=cF3>MDF_SIB</span><span class=cF0>+</span><span class=cF3>RT_I64</span><span class=cF0>,</span><span class=cF3>REG_RSP</span><span class=cF0>+</span><span class=cF3>REG_RSP</span><span class=cF0><<8,0,SLASH_OP_FSTP,rip);
|
||
|
|
<a name="l209"></a> </span><span class=cF1>else</span><span class=cF0> </span><span class=cF1>if</span><span class=cF0> (rsp_size>8) </span><span class=cF7>{</span><span class=cF0>
|
||
|
|
<a name="l210"></a> </span><span class=cFD>ICSlashOp</span><span class=cF0>(tmpi,</span><span class=cF3>MDF_SIB</span><span class=cF0>+</span><span class=cF3>RT_I64</span><span class=cF0>,</span><span class=cF3>REG_RSP</span><span class=cF0>+</span><span class=cF3>REG_RSP</span><span class=cF0><<8,rsp_size-8,
|
||
|
|
<a name="l211"></a> SLASH_OP_FSTP,rip);
|
||
|
|
<a name="l212"></a> </span><span class=cFD>ICAddRSP</span><span class=cF0>(tmpi,rsp_size-8);
|
||
|
|
<a name="l213"></a> </span><span class=cF7>}</span><span class=cF0>
|
||
|
|
<a name="l214"></a> </span><span class=cFD>ICPop</span><span class=cF0>(tmpi,</span><span class=cF3>MDF_REG</span><span class=cF0>+</span><span class=cF3>RT_I64</span><span class=cF0>,</span><span class=cF3>REG_RAX</span><span class=cF0>,0,rip);
|
||
|
|
<a name="l215"></a> </span><span class=cF1>if</span><span class=cF0> (tmpi->arg1_type_pointed_to!=</span><span class=cF3>RT_F64</span><span class=cF0>)
|
||
|
|
<a name="l216"></a> </span><span class=cFD>ICFCvt2</span><span class=cF0>(cc,tmpi,</span><span class=cF3>REG_RAX</span><span class=cF0>,</span><span class=cF3>MDF_REG</span><span class=cF0>+</span><span class=cF3>RT_I64</span><span class=cF0>,</span><span class=cF3>REG_RAX</span><span class=cF0>,0,</span><span class=cF3>TRUE</span><span class=cF0>,rip);
|
||
|
|
<a name="l217"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi,</span><span class=cF3>MDF_DISP</span><span class=cF0>+tmpi->arg1_type_pointed_to,</span><span class=cF3>REG_RCX</span><span class=cF0>,0,
|
||
|
|
<a name="l218"></a> </span><span class=cF3>MDF_REG</span><span class=cF0>+</span><span class=cF3>RT_I64</span><span class=cF0>,</span><span class=cF3>REG_RAX</span><span class=cF0>,0,rip);
|
||
|
|
<a name="l219"></a> }
|
||
|
|
<a name="l220"></a> </span><span class=cF1>if</span><span class=cF0> (tmpi->res.type.mode)
|
||
|
|
<a name="l221"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi,tmpi->res.type,tmpi->res.</span><span class=cF1>reg</span><span class=cF0>,tmpi->res.disp,
|
||
|
|
<a name="l222"></a> </span><span class=cF3>MDF_REG</span><span class=cF0>+</span><span class=cF3>RT_I64</span><span class=cF0>,</span><span class=cF3>REG_RAX</span><span class=cF0>,0,rip);
|
||
|
|
<a name="l223"></a> </span><span class=cF7>}</span><span class=cF0>
|
||
|
|
<a name="l224"></a>}
|
||
|
|
<a name="l225"></a>
|
||
|
|
<a name="l226"></a></span><span class=cF1>U0</span><span class=cF0> </span><span class=cFD>ICFCmpAndBranch</span><span class=cF0>(</span><span class=cF9>CCmpCtrl</span><span class=cF0> *cc,</span><span class=cF9>CIntermediateCode</span><span class=cF0> *tmpi,</span><span class=cF9>I64</span><span class=cF0> rip,
|
||
|
|
<a name="l227"></a> </span><span class=cF9>I64</span><span class=cF0> us,</span><span class=cF9>I64</span><span class=cF0> not_us,</span><span class=cF1>U8</span><span class=cF0> *buf,</span><span class=cF9>I64</span><span class=cF0> rip2)
|
||
|
|
<a name="l228"></a>{
|
||
|
|
<a name="l229"></a> </span><span class=cF9>CICArg</span><span class=cF0> *arg1,*arg2;
|
||
|
|
<a name="l230"></a> </span><span class=cF1>Bool</span><span class=cF0> dont_push_float,dont_pop_float,alt,short_jmp;
|
||
|
|
<a name="l231"></a> </span><span class=cF9>I64</span><span class=cF0> i,rsp_size=0,builtin1=0,builtin2=0,t1,r1,d1,t2,r2,d2;
|
||
|
|
<a name="l232"></a> </span><span class=cF9>CCodeMisc</span><span class=cF0> *lb;
|
||
|
|
<a name="l233"></a> </span><span class=cF1>U8</span><span class=cF0> *buf2;
|
||
|
|
<a name="l234"></a>
|
||
|
|
<a name="l235"></a> </span><span class=cF1>if</span><span class=cF0> (tmpi->ic_flags&</span><span class=cF3>ICF_ALT_TEMPLATE</span><span class=cF0>) </span><span class=cF7>{</span><span class=cF0>
|
||
|
|
<a name="l236"></a> arg1=&tmpi->arg2;
|
||
|
|
<a name="l237"></a> arg2=&tmpi->arg1;
|
||
|
|
<a name="l238"></a> alt=</span><span class=cF3>TRUE</span><span class=cF0>;
|
||
|
|
<a name="l239"></a> </span><span class=cF7>}</span><span class=cF0> </span><span class=cF1>else</span><span class=cF0> </span><span class=cF7>{</span><span class=cF0>
|
||
|
|
<a name="l240"></a> arg1=&tmpi->arg1;
|
||
|
|
<a name="l241"></a> arg2=&tmpi->arg2;
|
||
|
|
<a name="l242"></a> alt=</span><span class=cF3>FALSE</span><span class=cF0>;
|
||
|
|
<a name="l243"></a> </span><span class=cF7>}</span><span class=cF0>
|
||
|
|
<a name="l244"></a>
|
||
|
|
<a name="l245"></a> </span><span class=cF1>if</span><span class=cF0> (cc->flags&</span><span class=cF3>CCF_AOT_COMPILE</span><span class=cF0>)
|
||
|
|
<a name="l246"></a> buf2=cc->aotc->rip;
|
||
|
|
<a name="l247"></a> </span><span class=cF1>else</span><span class=cF0>
|
||
|
|
<a name="l248"></a> buf2=buf;
|
||
|
|
<a name="l249"></a>
|
||
|
|
<a name="l250"></a> </span><span class=cFD>CmpSetFloatOpPushPop</span><span class=cF0>(cc,tmpi,&dont_push_float,&dont_pop_float);
|
||
|
|
<a name="l251"></a> </span><span class=cF1>if</span><span class=cF0> (dont_push_float) </span><span class=cF7>{</span><span class=cF0>
|
||
|
|
<a name="l252"></a> </span><span class=cF1>if</span><span class=cF0> (tmpi->ic_flags&</span><span class=cF3>ICF_POP_CMP</span><span class=cF0> && alt) {
|
||
|
|
<a name="l253"></a> t2=</span><span class=cF3>MDF_SIB</span><span class=cF0>+</span><span class=cF3>RT_I64</span><span class=cF0>; r2=</span><span class=cF3>REG_RSP</span><span class=cF0>+</span><span class=cF3>REG_RSP</span><span class=cF0><<8; d2=0;
|
||
|
|
<a name="l254"></a> rsp_size+=8;
|
||
|
|
<a name="l255"></a> } </span><span class=cF1>else</span><span class=cF0> {
|
||
|
|
<a name="l256"></a> </span><span class=cF1>if</span><span class=cF0> (arg2->type.raw_type>=</span><span class=cF3>RT_I64</span><span class=cF0> && arg2->type&</span><span class=cF3>MDG_DISP_SIB_RIP</span><span class=cF0>) </span><span class=cF7>{</span><span class=cF0>
|
||
|
|
<a name="l257"></a> t2=arg2->type;
|
||
|
|
<a name="l258"></a> r2=arg2-></span><span class=cF1>reg</span><span class=cF0>;
|
||
|
|
<a name="l259"></a> d2=arg2->disp;
|
||
|
|
<a name="l260"></a> </span><span class=cF7>}</span><span class=cF0> </span><span class=cF1>else</span><span class=cF0> </span><span class=cF7>{</span><span class=cF0>
|
||
|
|
<a name="l261"></a> </span><span class=cF1>if</span><span class=cF0> (arg2->type&</span><span class=cF3>MDF_IMM</span><span class=cF0>) {
|
||
|
|
<a name="l262"></a> </span><span class=cF1>if</span><span class=cF0> (!</span><span class=cF7>(</span><span class=cF0>builtin2=</span><span class=cFD>ICBuiltInFloatConst</span><span class=cF0>(arg2->disp</span><span class=cF7>(</span><span class=cF1>F64</span><span class=cF7>)</span><span class=cF0>)</span><span class=cF7>)</span><span class=cF0> ||
|
||
|
|
<a name="l263"></a> tmpi->ic_flags&</span><span class=cF3>ICF_PUSH_CMP</span><span class=cF0>) </span><span class=cF7>{</span><span class=cF0>
|
||
|
|
<a name="l264"></a> t2=</span><span class=cF3>MDF_RIP_DISP32</span><span class=cF0>+</span><span class=cF3>RT_I64</span><span class=cF0>;
|
||
|
|
<a name="l265"></a> r2=</span><span class=cF3>REG_RIP</span><span class=cF0>;
|
||
|
|
<a name="l266"></a> d2=</span><span class=cFD>COCFloatConstFind</span><span class=cF0>(cc,arg2->disp</span><span class=cF7>(</span><span class=cF1>F64</span><span class=cF7>)</span><span class=cF0>)+buf2;
|
||
|
|
<a name="l267"></a> </span><span class=cF7>}</span><span class=cF0>
|
||
|
|
<a name="l268"></a> } </span><span class=cF1>else</span><span class=cF0> {
|
||
|
|
<a name="l269"></a> </span><span class=cFD>ICPush</span><span class=cF0>(tmpi,arg2->type,arg2-></span><span class=cF1>reg</span><span class=cF0>,arg2->disp,rip2);
|
||
|
|
<a name="l270"></a> t2=</span><span class=cF3>MDF_SIB</span><span class=cF0>+</span><span class=cF3>RT_I64</span><span class=cF0>; r2=</span><span class=cF3>REG_RSP</span><span class=cF0>+</span><span class=cF3>REG_RSP</span><span class=cF0><<8; d2=0;
|
||
|
|
<a name="l271"></a> rsp_size+=8;
|
||
|
|
<a name="l272"></a> }
|
||
|
|
<a name="l273"></a> </span><span class=cF7>}</span><span class=cF0>
|
||
|
|
<a name="l274"></a> }
|
||
|
|
<a name="l275"></a> </span><span class=cF7>}</span><span class=cF0> </span><span class=cF1>else</span><span class=cF0> </span><span class=cF7>{</span><span class=cF0>
|
||
|
|
<a name="l276"></a> </span><span class=cF1>if</span><span class=cF0> (alt) {
|
||
|
|
<a name="l277"></a> </span><span class=cF1>if</span><span class=cF0> (!</span><span class=cF7>(</span><span class=cF0>arg2->type&</span><span class=cF3>MDF_STK</span><span class=cF7>)</span><span class=cF0>) </span><span class=cF7>{</span><span class=cF0>
|
||
|
|
<a name="l278"></a> </span><span class=cF1>if</span><span class=cF0> (tmpi->ic_flags&</span><span class=cF3>ICF_POP_CMP</span><span class=cF0>) {
|
||
|
|
<a name="l279"></a> t1=</span><span class=cF3>MDF_SIB</span><span class=cF0>+</span><span class=cF3>RT_I64</span><span class=cF0>; r1=</span><span class=cF3>REG_RSP</span><span class=cF0>+</span><span class=cF3>REG_RSP</span><span class=cF0><<8; d1=0;
|
||
|
|
<a name="l280"></a> rsp_size+=8;
|
||
|
|
<a name="l281"></a> } </span><span class=cF1>else</span><span class=cF0> {
|
||
|
|
<a name="l282"></a> </span><span class=cF1>if</span><span class=cF0> (arg1->type.raw_type>=</span><span class=cF3>RT_I64</span><span class=cF0> && arg1->type&</span><span class=cF3>MDG_DISP_SIB_RIP</span><span class=cF0>) </span><span class=cF7>{</span><span class=cF0>
|
||
|
|
<a name="l283"></a> t1=arg1->type;
|
||
|
|
<a name="l284"></a> r1=arg1-></span><span class=cF1>reg</span><span class=cF0>;
|
||
|
|
<a name="l285"></a> d1=arg1->disp;
|
||
|
|
<a name="l286"></a> </span><span class=cF7>}</span><span class=cF0> </span><span class=cF1>else</span><span class=cF0> </span><span class=cF7>{</span><span class=cF0>
|
||
|
|
<a name="l287"></a> </span><span class=cF1>if</span><span class=cF0> (arg1->type&</span><span class=cF3>MDF_IMM</span><span class=cF0>) {
|
||
|
|
<a name="l288"></a> </span><span class=cF1>if</span><span class=cF0> (!</span><span class=cF7>(</span><span class=cF0>builtin1=</span><span class=cFD>ICBuiltInFloatConst</span><span class=cF0>(arg1->disp</span><span class=cF7>(</span><span class=cF1>F64</span><span class=cF7>)</span><span class=cF0>)</span><span class=cF7>)</span><span class=cF0>) </span><span class=cF7>{</span><span class=cF0>
|
||
|
|
<a name="l289"></a> t1=</span><span class=cF3>MDF_RIP_DISP32</span><span class=cF0>+</span><span class=cF3>RT_I64</span><span class=cF0>;
|
||
|
|
<a name="l290"></a> r1=</span><span class=cF3>REG_RIP</span><span class=cF0>;
|
||
|
|
<a name="l291"></a> d1=</span><span class=cFD>COCFloatConstFind</span><span class=cF0>(cc,arg1->disp</span><span class=cF7>(</span><span class=cF1>F64</span><span class=cF7>)</span><span class=cF0>)+buf2;
|
||
|
|
<a name="l292"></a> </span><span class=cF7>}</span><span class=cF0>
|
||
|
|
<a name="l293"></a> } </span><span class=cF1>else</span><span class=cF0> {
|
||
|
|
<a name="l294"></a> </span><span class=cFD>ICPush</span><span class=cF0>(tmpi,arg1->type,arg1-></span><span class=cF1>reg</span><span class=cF0>,arg1->disp,rip2);
|
||
|
|
<a name="l295"></a> t1=</span><span class=cF3>MDF_SIB</span><span class=cF0>+</span><span class=cF3>RT_I64</span><span class=cF0>; r1=</span><span class=cF3>REG_RSP</span><span class=cF0>+</span><span class=cF3>REG_RSP</span><span class=cF0><<8; d1=0;
|
||
|
|
<a name="l296"></a> rsp_size+=8;
|
||
|
|
<a name="l297"></a> }
|
||
|
|
<a name="l298"></a> </span><span class=cF7>}</span><span class=cF0>
|
||
|
|
<a name="l299"></a> }
|
||
|
|
<a name="l300"></a> </span><span class=cF1>if</span><span class=cF0> (arg2->type.raw_type>=</span><span class=cF3>RT_I64</span><span class=cF0> && arg2->type&</span><span class=cF3>MDG_DISP_SIB_RIP</span><span class=cF0>) {
|
||
|
|
<a name="l301"></a> t2=arg2->type;
|
||
|
|
<a name="l302"></a> r2=arg2-></span><span class=cF1>reg</span><span class=cF0>;
|
||
|
|
<a name="l303"></a> d2=arg2->disp;
|
||
|
|
<a name="l304"></a> } </span><span class=cF1>else</span><span class=cF0> {
|
||
|
|
<a name="l305"></a> </span><span class=cF1>if</span><span class=cF0> (arg2->type&</span><span class=cF3>MDF_IMM</span><span class=cF0>) </span><span class=cF7>{</span><span class=cF0>
|
||
|
|
<a name="l306"></a> </span><span class=cF1>if</span><span class=cF0> (!</span><span class=cF7>(</span><span class=cF0>builtin2=</span><span class=cFD>ICBuiltInFloatConst</span><span class=cF0>(arg2->disp</span><span class=cF7>(</span><span class=cF1>F64</span><span class=cF7>)</span><span class=cF0>)</span><span class=cF7>)</span><span class=cF0> ||
|
||
|
|
<a name="l307"></a> tmpi->ic_flags&</span><span class=cF3>ICF_PUSH_CMP</span><span class=cF0>) {
|
||
|
|
<a name="l308"></a> t2=</span><span class=cF3>MDF_RIP_DISP32</span><span class=cF0>+</span><span class=cF3>RT_I64</span><span class=cF0>;
|
||
|
|
<a name="l309"></a> r2=</span><span class=cF3>REG_RIP</span><span class=cF0>;
|
||
|
|
<a name="l310"></a> d2=</span><span class=cFD>COCFloatConstFind</span><span class=cF0>(cc,arg2->disp</span><span class=cF7>(</span><span class=cF1>F64</span><span class=cF7>)</span><span class=cF0>)+buf2;
|
||
|
|
<a name="l311"></a> }
|
||
|
|
<a name="l312"></a> </span><span class=cF7>}</span><span class=cF0> </span><span class=cF1>else</span><span class=cF0> </span><span class=cF7>{</span><span class=cF0>
|
||
|
|
<a name="l313"></a> </span><span class=cFD>ICPush</span><span class=cF0>(tmpi,arg2->type,arg2-></span><span class=cF1>reg</span><span class=cF0>,arg2->disp,rip2);
|
||
|
|
<a name="l314"></a> t2=</span><span class=cF3>MDF_SIB</span><span class=cF0>+</span><span class=cF3>RT_I64</span><span class=cF0>; r2=</span><span class=cF3>REG_RSP</span><span class=cF0>+</span><span class=cF3>REG_RSP</span><span class=cF0><<8; d2=0;
|
||
|
|
<a name="l315"></a> rsp_size+=8;
|
||
|
|
<a name="l316"></a> </span><span class=cF1>if</span><span class=cF0> (r1==</span><span class=cF3>REG_RSP</span><span class=cF0>+</span><span class=cF3>REG_RSP</span><span class=cF0><<8)
|
||
|
|
<a name="l317"></a> d1+=8;
|
||
|
|
<a name="l318"></a> </span><span class=cF7>}</span><span class=cF0>
|
||
|
|
<a name="l319"></a> }
|
||
|
|
<a name="l320"></a> </span><span class=cF7>}</span><span class=cF0> </span><span class=cF1>else</span><span class=cF0> </span><span class=cF7>{</span><span class=cF0>
|
||
|
|
<a name="l321"></a> </span><span class=cF1>if</span><span class=cF0> (tmpi->ic_flags&</span><span class=cF3>ICF_POP_CMP</span><span class=cF0>)
|
||
|
|
<a name="l322"></a> </span><span class=cFD>ICPopRegs</span><span class=cF0>(tmpi,1<<</span><span class=cF3>REG_RDX</span><span class=cF0>);
|
||
|
|
<a name="l323"></a> </span><span class=cF1>else</span><span class=cF0>
|
||
|
|
<a name="l324"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi,</span><span class=cF3>MDF_REG</span><span class=cF0>+</span><span class=cF3>RT_I64</span><span class=cF0>,</span><span class=cF3>REG_RDX</span><span class=cF0>,0,arg1->type,
|
||
|
|
<a name="l325"></a> arg1-></span><span class=cF1>reg</span><span class=cF0>,arg1->disp,rip2);
|
||
|
|
<a name="l326"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi,</span><span class=cF3>MDF_REG</span><span class=cF0>+</span><span class=cF3>RT_I64</span><span class=cF0>,</span><span class=cF3>REG_RAX</span><span class=cF0>,0,arg2->type,
|
||
|
|
<a name="l327"></a> arg2-></span><span class=cF1>reg</span><span class=cF0>,arg2->disp,rip2);
|
||
|
|
<a name="l328"></a> </span><span class=cFD>ICU16</span><span class=cF0>(tmpi,0x5052); </span><span class=cF2>//PUSH EDX PUSH EAX</span><span class=cF0>
|
||
|
|
<a name="l329"></a> rsp_size=16;
|
||
|
|
<a name="l330"></a> t1=</span><span class=cF3>MDF_SIB</span><span class=cF0>+</span><span class=cF3>RT_I64</span><span class=cF0>; r1=</span><span class=cF3>REG_RSP</span><span class=cF0>+</span><span class=cF3>REG_RSP</span><span class=cF0><<8; d1=8;
|
||
|
|
<a name="l331"></a> t2=</span><span class=cF3>MDF_SIB</span><span class=cF0>+</span><span class=cF3>RT_I64</span><span class=cF0>; r2=</span><span class=cF3>REG_RSP</span><span class=cF0>+</span><span class=cF3>REG_RSP</span><span class=cF0><<8; d2=0;
|
||
|
|
<a name="l332"></a> </span><span class=cF7>}</span><span class=cF0>
|
||
|
|
<a name="l333"></a> } </span><span class=cF1>else</span><span class=cF0> {
|
||
|
|
<a name="l334"></a> </span><span class=cF1>if</span><span class=cF0> (!</span><span class=cF7>(</span><span class=cF0>arg1->type&</span><span class=cF3>MDF_STK</span><span class=cF7>)</span><span class=cF0>) </span><span class=cF7>{</span><span class=cF0>
|
||
|
|
<a name="l335"></a> </span><span class=cF1>if</span><span class=cF0> (arg2->type.raw_type>=</span><span class=cF3>RT_I64</span><span class=cF0> && arg2->type&</span><span class=cF3>MDG_DISP_SIB_RIP</span><span class=cF0>) {
|
||
|
|
<a name="l336"></a> t2=arg2->type;
|
||
|
|
<a name="l337"></a> r2=arg2-></span><span class=cF1>reg</span><span class=cF0>;
|
||
|
|
<a name="l338"></a> d2=arg2->disp;
|
||
|
|
<a name="l339"></a> } </span><span class=cF1>else</span><span class=cF0> {
|
||
|
|
<a name="l340"></a> </span><span class=cF1>if</span><span class=cF0> (arg2->type&</span><span class=cF3>MDF_IMM</span><span class=cF0>) </span><span class=cF7>{</span><span class=cF0>
|
||
|
|
<a name="l341"></a> </span><span class=cF1>if</span><span class=cF0> (!</span><span class=cF7>(</span><span class=cF0>builtin2=</span><span class=cFD>ICBuiltInFloatConst</span><span class=cF0>(arg2->disp</span><span class=cF7>(</span><span class=cF1>F64</span><span class=cF7>)</span><span class=cF0>)</span><span class=cF7>)</span><span class=cF0> ||
|
||
|
|
<a name="l342"></a> tmpi->ic_flags&</span><span class=cF3>ICF_PUSH_CMP</span><span class=cF0>) {
|
||
|
|
<a name="l343"></a> t2=</span><span class=cF3>MDF_RIP_DISP32</span><span class=cF0>+</span><span class=cF3>RT_I64</span><span class=cF0>;
|
||
|
|
<a name="l344"></a> r2=</span><span class=cF3>REG_RIP</span><span class=cF0>;
|
||
|
|
<a name="l345"></a> d2=</span><span class=cFD>COCFloatConstFind</span><span class=cF0>(cc,arg2->disp</span><span class=cF7>(</span><span class=cF1>F64</span><span class=cF7>)</span><span class=cF0>)+buf2;
|
||
|
|
<a name="l346"></a> }
|
||
|
|
<a name="l347"></a> </span><span class=cF7>}</span><span class=cF0> </span><span class=cF1>else</span><span class=cF0> </span><span class=cF7>{</span><span class=cF0>
|
||
|
|
<a name="l348"></a> </span><span class=cFD>ICPush</span><span class=cF0>(tmpi,arg2->type,arg2-></span><span class=cF1>reg</span><span class=cF0>,arg2->disp,rip2);
|
||
|
|
<a name="l349"></a> t2=</span><span class=cF3>MDF_SIB</span><span class=cF0>+</span><span class=cF3>RT_I64</span><span class=cF0>; r2=</span><span class=cF3>REG_RSP</span><span class=cF0>+</span><span class=cF3>REG_RSP</span><span class=cF0><<8; d2=0;
|
||
|
|
<a name="l350"></a> rsp_size+=8;
|
||
|
|
<a name="l351"></a> </span><span class=cF7>}</span><span class=cF0>
|
||
|
|
<a name="l352"></a> }
|
||
|
|
<a name="l353"></a> </span><span class=cF1>if</span><span class=cF0> (tmpi->ic_flags&</span><span class=cF3>ICF_POP_CMP</span><span class=cF0>) {
|
||
|
|
<a name="l354"></a> t1=</span><span class=cF3>MDF_SIB</span><span class=cF0>+</span><span class=cF3>RT_I64</span><span class=cF0>; r1=</span><span class=cF3>REG_RSP</span><span class=cF0>+</span><span class=cF3>REG_RSP</span><span class=cF0><<8; d1=0;
|
||
|
|
<a name="l355"></a> rsp_size+=8;
|
||
|
|
<a name="l356"></a> </span><span class=cF1>if</span><span class=cF0> (r2==</span><span class=cF3>REG_RSP</span><span class=cF0>+</span><span class=cF3>REG_RSP</span><span class=cF0><<8)
|
||
|
|
<a name="l357"></a> d1+=8;
|
||
|
|
<a name="l358"></a> } </span><span class=cF1>else</span><span class=cF0> {
|
||
|
|
<a name="l359"></a> </span><span class=cF1>if</span><span class=cF0> (arg1->type.raw_type>=</span><span class=cF3>RT_I64</span><span class=cF0> && arg1->type&</span><span class=cF3>MDG_DISP_SIB_RIP</span><span class=cF0>) </span><span class=cF7>{</span><span class=cF0>
|
||
|
|
<a name="l360"></a> t1=arg1->type;
|
||
|
|
<a name="l361"></a> r1=arg1-></span><span class=cF1>reg</span><span class=cF0>;
|
||
|
|
<a name="l362"></a> d1=arg1->disp;
|
||
|
|
<a name="l363"></a> </span><span class=cF7>}</span><span class=cF0> </span><span class=cF1>else</span><span class=cF0> </span><span class=cF7>{</span><span class=cF0>
|
||
|
|
<a name="l364"></a> </span><span class=cF1>if</span><span class=cF0> (arg1->type&</span><span class=cF3>MDF_IMM</span><span class=cF0>) {
|
||
|
|
<a name="l365"></a> </span><span class=cF1>if</span><span class=cF0> (!</span><span class=cF7>(</span><span class=cF0>builtin1=</span><span class=cFD>ICBuiltInFloatConst</span><span class=cF0>(arg1->disp</span><span class=cF7>(</span><span class=cF1>F64</span><span class=cF7>)</span><span class=cF0>)</span><span class=cF7>)</span><span class=cF0>) </span><span class=cF7>{</span><span class=cF0>
|
||
|
|
<a name="l366"></a> t1=</span><span class=cF3>MDF_RIP_DISP32</span><span class=cF0>+</span><span class=cF3>RT_I64</span><span class=cF0>;
|
||
|
|
<a name="l367"></a> r1=</span><span class=cF3>REG_RIP</span><span class=cF0>;
|
||
|
|
<a name="l368"></a> d1=</span><span class=cFD>COCFloatConstFind</span><span class=cF0>(cc,arg1->disp</span><span class=cF7>(</span><span class=cF1>F64</span><span class=cF7>)</span><span class=cF0>)+buf2;
|
||
|
|
<a name="l369"></a> </span><span class=cF7>}</span><span class=cF0>
|
||
|
|
<a name="l370"></a> } </span><span class=cF1>else</span><span class=cF0> {
|
||
|
|
<a name="l371"></a> </span><span class=cFD>ICPush</span><span class=cF0>(tmpi,arg1->type,arg1-></span><span class=cF1>reg</span><span class=cF0>,arg1->disp,rip2);
|
||
|
|
<a name="l372"></a> t1=</span><span class=cF3>MDF_SIB</span><span class=cF0>+</span><span class=cF3>RT_I64</span><span class=cF0>; r1=</span><span class=cF3>REG_RSP</span><span class=cF0>+</span><span class=cF3>REG_RSP</span><span class=cF0><<8; d1=0;
|
||
|
|
<a name="l373"></a> rsp_size+=8;
|
||
|
|
<a name="l374"></a> </span><span class=cF1>if</span><span class=cF0> (r2==</span><span class=cF3>REG_RSP</span><span class=cF0>+</span><span class=cF3>REG_RSP</span><span class=cF0><<8)
|
||
|
|
<a name="l375"></a> d2+=8;
|
||
|
|
<a name="l376"></a> }
|
||
|
|
<a name="l377"></a> </span><span class=cF7>}</span><span class=cF0>
|
||
|
|
<a name="l378"></a> }
|
||
|
|
<a name="l379"></a> </span><span class=cF7>}</span><span class=cF0> </span><span class=cF1>else</span><span class=cF0> </span><span class=cF7>{</span><span class=cF0>
|
||
|
|
<a name="l380"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi,</span><span class=cF3>MDF_REG</span><span class=cF0>+</span><span class=cF3>RT_I64</span><span class=cF0>,</span><span class=cF3>REG_RAX</span><span class=cF0>,0,arg2->type,
|
||
|
|
<a name="l381"></a> arg2-></span><span class=cF1>reg</span><span class=cF0>,arg2->disp,rip2);
|
||
|
|
<a name="l382"></a> </span><span class=cF1>if</span><span class=cF0> (tmpi->ic_flags&</span><span class=cF3>ICF_POP_CMP</span><span class=cF0>)
|
||
|
|
<a name="l383"></a> </span><span class=cFD>ICPopRegs</span><span class=cF0>(tmpi,1<<</span><span class=cF3>REG_RDX</span><span class=cF0>);
|
||
|
|
<a name="l384"></a> </span><span class=cF1>else</span><span class=cF0>
|
||
|
|
<a name="l385"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi,</span><span class=cF3>MDF_REG</span><span class=cF0>+</span><span class=cF3>RT_I64</span><span class=cF0>,</span><span class=cF3>REG_RDX</span><span class=cF0>,0,arg1->type,
|
||
|
|
<a name="l386"></a> arg1-></span><span class=cF1>reg</span><span class=cF0>,arg1->disp,rip2);
|
||
|
|
<a name="l387"></a> </span><span class=cFD>ICU16</span><span class=cF0>(tmpi,0x5052); </span><span class=cF2>//PUSH EDX PUSH EAX</span><span class=cF0>
|
||
|
|
<a name="l388"></a> rsp_size=16;
|
||
|
|
<a name="l389"></a> t1=</span><span class=cF3>MDF_SIB</span><span class=cF0>+</span><span class=cF3>RT_I64</span><span class=cF0>; r1=</span><span class=cF3>REG_RSP</span><span class=cF0>+</span><span class=cF3>REG_RSP</span><span class=cF0><<8; d1=8;
|
||
|
|
<a name="l390"></a> t2=</span><span class=cF3>MDF_SIB</span><span class=cF0>+</span><span class=cF3>RT_I64</span><span class=cF0>; r2=</span><span class=cF3>REG_RSP</span><span class=cF0>+</span><span class=cF3>REG_RSP</span><span class=cF0><<8; d2=0;
|
||
|
|
<a name="l391"></a> </span><span class=cF7>}</span><span class=cF0>
|
||
|
|
<a name="l392"></a> }
|
||
|
|
<a name="l393"></a> </span><span class=cF7>}</span><span class=cF0>
|
||
|
|
<a name="l394"></a> </span><span class=cF1>if</span><span class=cF0> (!dont_push_float) </span><span class=cF7>{</span><span class=cF0>
|
||
|
|
<a name="l395"></a> </span><span class=cF1>if</span><span class=cF0> (builtin1)
|
||
|
|
<a name="l396"></a> </span><span class=cFD>ICU16</span><span class=cF0>(tmpi,builtin1);
|
||
|
|
<a name="l397"></a> </span><span class=cF1>else</span><span class=cF0>
|
||
|
|
<a name="l398"></a> </span><span class=cFD>ICSlashOp</span><span class=cF0>(tmpi,t1,r1,d1,SLASH_OP_FLD,rip2);
|
||
|
|
<a name="l399"></a> </span><span class=cF7>}</span><span class=cF0>
|
||
|
|
<a name="l400"></a> </span><span class=cF1>if</span><span class=cF0> (!alt)
|
||
|
|
<a name="l401"></a> us=not_us;
|
||
|
|
<a name="l402"></a> </span><span class=cF1>if</span><span class=cF0> (builtin2)
|
||
|
|
<a name="l403"></a> </span><span class=cFD>ICU16</span><span class=cF0>(tmpi,builtin2);
|
||
|
|
<a name="l404"></a> </span><span class=cF1>else</span><span class=cF0>
|
||
|
|
<a name="l405"></a> </span><span class=cFD>ICSlashOp</span><span class=cF0>(tmpi,t2,r2,d2,SLASH_OP_FLD,rip2);
|
||
|
|
<a name="l406"></a> </span><span class=cF1>if</span><span class=cF0> (tmpi->ic_flags&</span><span class=cF3>ICF_PUSH_CMP</span><span class=cF0>) </span><span class=cF7>{</span><span class=cF0>
|
||
|
|
<a name="l407"></a> t2=</span><span class=cF3>MDF_SIB</span><span class=cF0>+</span><span class=cF3>RT_I64</span><span class=cF0>; r2=</span><span class=cF3>REG_RSP</span><span class=cF0>+</span><span class=cF3>REG_RSP</span><span class=cF0><<8; d2=0;
|
||
|
|
<a name="l408"></a> </span><span class=cF1>if</span><span class=cF0> (!rsp_size) {
|
||
|
|
<a name="l409"></a> rsp_size=8;
|
||
|
|
<a name="l410"></a> </span><span class=cFD>ICAddRSP</span><span class=cF0>(tmpi,-8);
|
||
|
|
<a name="l411"></a> } </span><span class=cF1>else</span><span class=cF0> </span><span class=cF1>if</span><span class=cF0> (rsp_size==16)
|
||
|
|
<a name="l412"></a> d2=8;
|
||
|
|
<a name="l413"></a>
|
||
|
|
<a name="l414"></a> </span><span class=cF1>if</span><span class=cF0> (alt) {
|
||
|
|
<a name="l415"></a> </span><span class=cFD>ICU16</span><span class=cF0>(tmpi,0xF1DF); </span><span class=cF2>//FCOMIP</span><span class=cF0>
|
||
|
|
<a name="l416"></a> </span><span class=cFD>ICSlashOp</span><span class=cF0>(tmpi,t2,r2,d2,SLASH_OP_FSTP,rip2);
|
||
|
|
<a name="l417"></a> } </span><span class=cF1>else</span><span class=cF0> {
|
||
|
|
<a name="l418"></a> </span><span class=cFD>ICU16</span><span class=cF0>(tmpi,0xF1DB); </span><span class=cF2>//FCOMI</span><span class=cF0>
|
||
|
|
<a name="l419"></a> </span><span class=cFD>ICSlashOp</span><span class=cF0>(tmpi,t2,r2,d2,SLASH_OP_FSTP,rip2);
|
||
|
|
<a name="l420"></a> </span><span class=cFD>ICU32</span><span class=cF0>(tmpi,0xF7D9C0DD); </span><span class=cF2>//FFREE,FINCSTP</span><span class=cF0>
|
||
|
|
<a name="l421"></a> }
|
||
|
|
<a name="l422"></a> </span><span class=cF7>}</span><span class=cF0> </span><span class=cF1>else</span><span class=cF0> </span><span class=cF7>{</span><span class=cF0>
|
||
|
|
<a name="l423"></a> </span><span class=cFD>ICU16</span><span class=cF0>(tmpi,0xF1DF); </span><span class=cF2>//FCOMIP</span><span class=cF0>
|
||
|
|
<a name="l424"></a> </span><span class=cFD>ICU32</span><span class=cF0>(tmpi,0xF7D9C0DD); </span><span class=cF2>//FFREE,FINCSTP</span><span class=cF0>
|
||
|
|
<a name="l425"></a> </span><span class=cF7>}</span><span class=cF0>
|
||
|
|
<a name="l426"></a> </span><span class=cFD>CmpNoteFloatOp</span><span class=cF0>(cc,tmpi,</span><span class=cF3>TRUE</span><span class=cF0>,</span><span class=cF3>FALSE</span><span class=cF0>,CN_INST);
|
||
|
|
<a name="l427"></a>
|
||
|
|
<a name="l428"></a> </span><span class=cF1>if</span><span class=cF0> (tmpi->ic_flags&</span><span class=cF3>ICF_PUSH_CMP</span><span class=cF0>) </span><span class=cF7>{</span><span class=cF0>
|
||
|
|
<a name="l429"></a> </span><span class=cF1>if</span><span class=cF0> (r2.u8[0]==</span><span class=cF3>REG_RSP</span><span class=cF0>) {
|
||
|
|
<a name="l430"></a> </span><span class=cF1>while</span><span class=cF0> (d2 && rsp_size) </span><span class=cF7>{</span><span class=cF0>
|
||
|
|
<a name="l431"></a> </span><span class=cFD>ICU8</span><span class=cF0>(tmpi,0x5B); </span><span class=cF2>//POP RBX (Dont change flags)</span><span class=cF0>
|
||
|
|
<a name="l432"></a> rsp_size-=8;
|
||
|
|
<a name="l433"></a> d2-=8;
|
||
|
|
<a name="l434"></a> </span><span class=cF7>}</span><span class=cF0>
|
||
|
|
<a name="l435"></a> } </span><span class=cF1>else</span><span class=cF0> {
|
||
|
|
<a name="l436"></a> </span><span class=cF1>while</span><span class=cF0> (rsp_size) </span><span class=cF7>{</span><span class=cF0>
|
||
|
|
<a name="l437"></a> </span><span class=cFD>ICU8</span><span class=cF0>(tmpi,0x5B); </span><span class=cF2>//POP RBX (Dont change flags)</span><span class=cF0>
|
||
|
|
<a name="l438"></a> rsp_size-=8;
|
||
|
|
<a name="l439"></a> </span><span class=cF7>}</span><span class=cF0>
|
||
|
|
<a name="l440"></a> </span><span class=cFD>ICPush</span><span class=cF0>(tmpi,t2,r2,d2,rip2);
|
||
|
|
<a name="l441"></a> }
|
||
|
|
<a name="l442"></a> </span><span class=cF7>}</span><span class=cF0> </span><span class=cF1>else</span><span class=cF0> </span><span class=cF7>{</span><span class=cF0>
|
||
|
|
<a name="l443"></a> </span><span class=cF1>while</span><span class=cF0> (rsp_size) {
|
||
|
|
<a name="l444"></a> </span><span class=cFD>ICU8</span><span class=cF0>(tmpi,0x5B); </span><span class=cF2>//POP RBX (Dont change flags)</span><span class=cF0>
|
||
|
|
<a name="l445"></a> rsp_size-=8;
|
||
|
|
<a name="l446"></a> }
|
||
|
|
<a name="l447"></a> </span><span class=cF7>}</span><span class=cF0>
|
||
|
|
<a name="l448"></a>
|
||
|
|
<a name="l449"></a> rip+=tmpi->ic_cnt;
|
||
|
|
<a name="l450"></a> lb=</span><span class=cFD>OptLabelFwd</span><span class=cF0>(tmpi->ic_data);
|
||
|
|
<a name="l451"></a> short_jmp=</span><span class=cF5>ToBool</span><span class=cF0>(tmpi->ic_flags&</span><span class=cF3>ICF_SHORT_JMP</span><span class=cF0>);
|
||
|
|
<a name="l452"></a> </span><span class=cF1>if</span><span class=cF0> (!buf && lb->addr!=</span><span class=cF3>INVALID_PTR</span><span class=cF0>) </span><span class=cF7>{</span><span class=cF0>
|
||
|
|
<a name="l453"></a> i=lb->addr-(rip+2);
|
||
|
|
<a name="l454"></a> </span><span class=cF1>if</span><span class=cF0> (lb->flags&</span><span class=cF3>CMF_POP_CMP</span><span class=cF0>) {
|
||
|
|
<a name="l455"></a> </span><span class=cF1>if</span><span class=cF0>(tmpi->ic_flags&</span><span class=cF3>ICF_PUSH_CMP</span><span class=cF0>)
|
||
|
|
<a name="l456"></a> i+=4;
|
||
|
|
<a name="l457"></a> </span><span class=cF1>else</span><span class=cF0>
|
||
|
|
<a name="l458"></a> i+=8;
|
||
|
|
<a name="l459"></a> }
|
||
|
|
<a name="l460"></a> </span><span class=cF1>if</span><span class=cF0> (</span><span class=cF3>I8_MIN</span><span class=cF0><=i<=</span><span class=cF3>I8_MAX</span><span class=cF0>)
|
||
|
|
<a name="l461"></a> short_jmp=</span><span class=cF3>TRUE</span><span class=cF0>;
|
||
|
|
<a name="l462"></a> </span><span class=cF7>}</span><span class=cF0>
|
||
|
|
<a name="l463"></a>
|
||
|
|
<a name="l464"></a> </span><span class=cF1>if</span><span class=cF0> (short_jmp) </span><span class=cF7>{</span><span class=cF0>
|
||
|
|
<a name="l465"></a> tmpi->ic_flags|=</span><span class=cF3>ICF_SHORT_JMP</span><span class=cF0>;
|
||
|
|
<a name="l466"></a> i=lb->addr-(rip+2);
|
||
|
|
<a name="l467"></a> </span><span class=cF1>if</span><span class=cF0> (lb->flags&</span><span class=cF3>CMF_POP_CMP</span><span class=cF0>) {
|
||
|
|
<a name="l468"></a> </span><span class=cF1>if</span><span class=cF0>(tmpi->ic_flags&</span><span class=cF3>ICF_PUSH_CMP</span><span class=cF0>)
|
||
|
|
<a name="l469"></a> i+=4;
|
||
|
|
<a name="l470"></a> </span><span class=cF1>else</span><span class=cF0>
|
||
|
|
<a name="l471"></a> i+=8;
|
||
|
|
<a name="l472"></a> }
|
||
|
|
<a name="l473"></a> </span><span class=cFD>ICU16</span><span class=cF0>(tmpi,i<<8+us.u8[2]);
|
||
|
|
<a name="l474"></a> </span><span class=cF7>}</span><span class=cF0> </span><span class=cF1>else</span><span class=cF0> </span><span class=cF7>{</span><span class=cF0>
|
||
|
|
<a name="l475"></a> tmpi->ic_flags&=~</span><span class=cF3>ICF_SHORT_JMP</span><span class=cF0>;
|
||
|
|
<a name="l476"></a> i=lb->addr-(rip+6);
|
||
|
|
<a name="l477"></a> </span><span class=cF1>if</span><span class=cF0> (lb->flags&</span><span class=cF3>CMF_POP_CMP</span><span class=cF0>) {
|
||
|
|
<a name="l478"></a> </span><span class=cF1>if</span><span class=cF0>(tmpi->ic_flags&</span><span class=cF3>ICF_PUSH_CMP</span><span class=cF0>)
|
||
|
|
<a name="l479"></a> i+=4;
|
||
|
|
<a name="l480"></a> </span><span class=cF1>else</span><span class=cF0>
|
||
|
|
<a name="l481"></a> i+=8;
|
||
|
|
<a name="l482"></a> }
|
||
|
|
<a name="l483"></a> </span><span class=cFD>ICU16</span><span class=cF0>(tmpi,us.u16[0]);
|
||
|
|
<a name="l484"></a> </span><span class=cFD>ICU32</span><span class=cF0>(tmpi,i);
|
||
|
|
<a name="l485"></a> </span><span class=cF7>}</span><span class=cF0>
|
||
|
|
<a name="l486"></a>}
|
||
|
|
<a name="l487"></a>
|
||
|
|
<a name="l488"></a></span><span class=cF1>U0</span><span class=cF0> </span><span class=cFD>ICFMul</span><span class=cF0>(</span><span class=cF9>CCmpCtrl</span><span class=cF0> *cc,</span><span class=cF9>CIntermediateCode</span><span class=cF0> *tmpi,</span><span class=cF1>U8</span><span class=cF0> *buf,</span><span class=cF9>I64</span><span class=cF0> rip)
|
||
|
|
<a name="l489"></a>{
|
||
|
|
<a name="l490"></a> </span><span class=cF1>if</span><span class=cF0> (tmpi->arg1.type&</span><span class=cF3>MDF_IMM</span><span class=cF0> && tmpi->arg1.type&</span><span class=cF3>RTG_MASK</span><span class=cF0>==</span><span class=cF3>RT_F64</span><span class=cF0> &&
|
||
|
|
<a name="l491"></a> tmpi->arg1.disp</span><span class=cF7>(</span><span class=cF1>F64</span><span class=cF7>)</span><span class=cF0>==1.0) </span><span class=cF7>{</span><span class=cF0>
|
||
|
|
<a name="l492"></a> </span><span class=cFD>CmpNoteFloatOp</span><span class=cF0>(cc,tmpi,</span><span class=cF3>FALSE</span><span class=cF0>,</span><span class=cF3>FALSE</span><span class=cF0>,CN_INST);
|
||
|
|
<a name="l493"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi,tmpi->res.type,tmpi->res.</span><span class=cF1>reg</span><span class=cF0>,tmpi->res.disp,
|
||
|
|
<a name="l494"></a> tmpi->arg2.type,tmpi->arg2.</span><span class=cF1>reg</span><span class=cF0>,tmpi->arg2.disp,rip);
|
||
|
|
<a name="l495"></a> </span><span class=cF7>}</span><span class=cF0> </span><span class=cF1>else</span><span class=cF0> </span><span class=cF1>if</span><span class=cF0> (tmpi->arg2.type&</span><span class=cF3>MDF_IMM</span><span class=cF0> &&
|
||
|
|
<a name="l496"></a> tmpi->arg2.type&</span><span class=cF3>RTG_MASK</span><span class=cF0>==</span><span class=cF3>RT_F64</span><span class=cF0>&& tmpi->arg2.disp</span><span class=cF7>(</span><span class=cF1>F64</span><span class=cF7>)</span><span class=cF0>==1.0) </span><span class=cF7>{</span><span class=cF0>
|
||
|
|
<a name="l497"></a> </span><span class=cFD>CmpNoteFloatOp</span><span class=cF0>(cc,tmpi,</span><span class=cF3>FALSE</span><span class=cF0>,</span><span class=cF3>FALSE</span><span class=cF0>,CN_INST);
|
||
|
|
<a name="l498"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi,tmpi->res.type,tmpi->res.</span><span class=cF1>reg</span><span class=cF0>,tmpi->res.disp,
|
||
|
|
<a name="l499"></a> tmpi->arg1.type,tmpi->arg1.</span><span class=cF1>reg</span><span class=cF0>,tmpi->arg1.disp,rip);
|
||
|
|
<a name="l500"></a> </span><span class=cF7>}</span><span class=cF0> </span><span class=cF1>else</span><span class=cF0>
|
||
|
|
<a name="l501"></a> </span><span class=cFD>ICFOp</span><span class=cF0>(cc,tmpi,SLASH_OP_FMUL,buf,rip);
|
||
|
|
<a name="l502"></a>}
|
||
|
|
<a name="l503"></a>
|
||
|
|
<a name="l504"></a></span><span class=cF1>U0</span><span class=cF0> </span><span class=cFD>ICFDiv</span><span class=cF0>(</span><span class=cF9>CCmpCtrl</span><span class=cF0> *cc,</span><span class=cF9>CIntermediateCode</span><span class=cF0> *tmpi,</span><span class=cF1>U8</span><span class=cF0> *buf,</span><span class=cF9>I64</span><span class=cF0> rip)
|
||
|
|
<a name="l505"></a>{
|
||
|
|
<a name="l506"></a> </span><span class=cF1>if</span><span class=cF0> (tmpi->arg2.type&</span><span class=cF3>MDF_IMM</span><span class=cF0> && tmpi->arg2.type&</span><span class=cF3>RTG_MASK</span><span class=cF0>==</span><span class=cF3>RT_F64</span><span class=cF0> &&
|
||
|
|
<a name="l507"></a> tmpi->arg2.disp</span><span class=cF7>(</span><span class=cF1>F64</span><span class=cF7>)</span><span class=cF0>==1.0) </span><span class=cF7>{</span><span class=cF0>
|
||
|
|
<a name="l508"></a> </span><span class=cFD>CmpNoteFloatOp</span><span class=cF0>(cc,tmpi,</span><span class=cF3>FALSE</span><span class=cF0>,</span><span class=cF3>FALSE</span><span class=cF0>,CN_INST);
|
||
|
|
<a name="l509"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi,tmpi->res.type,tmpi->res.</span><span class=cF1>reg</span><span class=cF0>,tmpi->res.disp,
|
||
|
|
<a name="l510"></a> tmpi->arg1.type,tmpi->arg1.</span><span class=cF1>reg</span><span class=cF0>,tmpi->arg1.disp,rip);
|
||
|
|
<a name="l511"></a> </span><span class=cF7>}</span><span class=cF0> </span><span class=cF1>else</span><span class=cF0>
|
||
|
|
<a name="l512"></a> </span><span class=cFD>ICFOp</span><span class=cF0>(cc,tmpi,SLASH_OP_FDIV,buf,rip);
|
||
|
|
<a name="l513"></a>}
|
||
|
|
<a name="l514"></a>
|
||
|
|
<a name="l515"></a></span><span class=cF1>U0</span><span class=cF0> </span><span class=cFD>ICFAdd</span><span class=cF0>(</span><span class=cF9>CCmpCtrl</span><span class=cF0> *cc,</span><span class=cF9>CIntermediateCode</span><span class=cF0> *tmpi,</span><span class=cF1>U8</span><span class=cF0> *buf,</span><span class=cF9>I64</span><span class=cF0> rip)
|
||
|
|
<a name="l516"></a>{
|
||
|
|
<a name="l517"></a> </span><span class=cF1>Bool</span><span class=cF0> dont_push_float,dont_pop_float;
|
||
|
|
<a name="l518"></a> </span><span class=cFD>CmpSetFloatOpPushPop</span><span class=cF0>(cc,tmpi,&dont_push_float,&dont_pop_float);
|
||
|
|
<a name="l519"></a> </span><span class=cF1>if</span><span class=cF0> (tmpi->arg1.type&</span><span class=cF3>MDF_IMM</span><span class=cF0> && !tmpi->arg1.disp) </span><span class=cF7>{</span><span class=cF0>
|
||
|
|
<a name="l520"></a> </span><span class=cF1>if</span><span class=cF0> (dont_push_float) {
|
||
|
|
<a name="l521"></a> </span><span class=cFD>ICCopyTemplate</span><span class=cF0>(cc,tmpi,</span><span class=cF3>CMP_TEMPLATE_FSTP</span><span class=cF0>,</span><span class=cF3>FALSE</span><span class=cF0>,</span><span class=cF3>TRUE</span><span class=cF0>,</span><span class=cF3>TRUE</span><span class=cF0>,CN_INST);
|
||
|
|
<a name="l522"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi,tmpi->res.type,tmpi->res.</span><span class=cF1>reg</span><span class=cF0>,tmpi->res.disp,
|
||
|
|
<a name="l523"></a> </span><span class=cF3>MDF_REG</span><span class=cF0>+</span><span class=cF3>RT_I64</span><span class=cF0>,</span><span class=cF3>REG_RAX</span><span class=cF0>,0,rip);
|
||
|
|
<a name="l524"></a> } </span><span class=cF1>else</span><span class=cF0> </span><span class=cF1>if</span><span class=cF0> (dont_pop_float) {
|
||
|
|
<a name="l525"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi,</span><span class=cF3>MDF_REG</span><span class=cF0>+</span><span class=cF3>RT_I64</span><span class=cF0>,</span><span class=cF3>REG_RAX</span><span class=cF0>,0,
|
||
|
|
<a name="l526"></a> tmpi->arg2.type,tmpi->arg2.</span><span class=cF1>reg</span><span class=cF0>,tmpi->arg2.disp,rip);
|
||
|
|
<a name="l527"></a> </span><span class=cFD>ICCopyTemplate</span><span class=cF0>(cc,tmpi,</span><span class=cF3>CMP_TEMPLATE_FLD</span><span class=cF0>,</span><span class=cF3>FALSE</span><span class=cF0>,</span><span class=cF3>TRUE</span><span class=cF0>,</span><span class=cF3>TRUE</span><span class=cF0>,CN_INST);
|
||
|
|
<a name="l528"></a> } </span><span class=cF1>else</span><span class=cF0> {
|
||
|
|
<a name="l529"></a> </span><span class=cFD>CmpNoteFloatOp</span><span class=cF0>(cc,tmpi,</span><span class=cF3>TRUE</span><span class=cF0>,</span><span class=cF3>TRUE</span><span class=cF0>,CN_INST);
|
||
|
|
<a name="l530"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi,tmpi->res.type,tmpi->res.</span><span class=cF1>reg</span><span class=cF0>,tmpi->res.disp,
|
||
|
|
<a name="l531"></a> tmpi->arg2.type,tmpi->arg2.</span><span class=cF1>reg</span><span class=cF0>,tmpi->arg2.disp,rip);
|
||
|
|
<a name="l532"></a> }
|
||
|
|
<a name="l533"></a> </span><span class=cF7>}</span><span class=cF0> </span><span class=cF1>else</span><span class=cF0> </span><span class=cF1>if</span><span class=cF0> (tmpi->arg2.type&</span><span class=cF3>MDF_IMM</span><span class=cF0> && !tmpi->arg2.disp) </span><span class=cF7>{</span><span class=cF0>
|
||
|
|
<a name="l534"></a> </span><span class=cF1>if</span><span class=cF0> (dont_push_float) {
|
||
|
|
<a name="l535"></a> </span><span class=cFD>ICCopyTemplate</span><span class=cF0>(cc,tmpi,</span><span class=cF3>CMP_TEMPLATE_FSTP</span><span class=cF0>,</span><span class=cF3>FALSE</span><span class=cF0>,</span><span class=cF3>TRUE</span><span class=cF0>,</span><span class=cF3>TRUE</span><span class=cF0>,CN_INST);
|
||
|
|
<a name="l536"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi,tmpi->res.type,tmpi->res.</span><span class=cF1>reg</span><span class=cF0>,tmpi->res.disp,
|
||
|
|
<a name="l537"></a> </span><span class=cF3>MDF_REG</span><span class=cF0>+</span><span class=cF3>RT_I64</span><span class=cF0>,</span><span class=cF3>REG_RAX</span><span class=cF0>,0,rip);
|
||
|
|
<a name="l538"></a> } </span><span class=cF1>else</span><span class=cF0> </span><span class=cF1>if</span><span class=cF0> (dont_pop_float) {
|
||
|
|
<a name="l539"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi,</span><span class=cF3>MDF_REG</span><span class=cF0>+</span><span class=cF3>RT_I64</span><span class=cF0>,</span><span class=cF3>REG_RAX</span><span class=cF0>,0,
|
||
|
|
<a name="l540"></a> tmpi->arg1.type,tmpi->arg1.</span><span class=cF1>reg</span><span class=cF0>,tmpi->arg1.disp,rip);
|
||
|
|
<a name="l541"></a> </span><span class=cFD>ICCopyTemplate</span><span class=cF0>(cc,tmpi,</span><span class=cF3>CMP_TEMPLATE_FLD</span><span class=cF0>,</span><span class=cF3>FALSE</span><span class=cF0>,</span><span class=cF3>TRUE</span><span class=cF0>,</span><span class=cF3>TRUE</span><span class=cF0>,CN_INST);
|
||
|
|
<a name="l542"></a> } </span><span class=cF1>else</span><span class=cF0> {
|
||
|
|
<a name="l543"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi,tmpi->res.type,tmpi->res.</span><span class=cF1>reg</span><span class=cF0>,tmpi->res.disp,
|
||
|
|
<a name="l544"></a> tmpi->arg1.type,tmpi->arg1.</span><span class=cF1>reg</span><span class=cF0>,tmpi->arg1.disp,rip);
|
||
|
|
<a name="l545"></a> </span><span class=cFD>CmpNoteFloatOp</span><span class=cF0>(cc,tmpi,</span><span class=cF3>TRUE</span><span class=cF0>,</span><span class=cF3>TRUE</span><span class=cF0>,CN_INST);
|
||
|
|
<a name="l546"></a> }
|
||
|
|
<a name="l547"></a> </span><span class=cF7>}</span><span class=cF0> </span><span class=cF1>else</span><span class=cF0>
|
||
|
|
<a name="l548"></a> </span><span class=cFD>ICFOp</span><span class=cF0>(cc,tmpi,SLASH_OP_FADD,buf,rip);
|
||
|
|
<a name="l549"></a>}
|
||
|
|
<a name="l550"></a>
|
||
|
|
<a name="l551"></a></span><span class=cF1>U0</span><span class=cF0> </span><span class=cFD>ICFSub</span><span class=cF0>(</span><span class=cF9>CCmpCtrl</span><span class=cF0> *cc,</span><span class=cF9>CIntermediateCode</span><span class=cF0> *tmpi,</span><span class=cF1>U8</span><span class=cF0> *buf,</span><span class=cF9>I64</span><span class=cF0> rip)
|
||
|
|
<a name="l552"></a>{
|
||
|
|
<a name="l553"></a> </span><span class=cF1>Bool</span><span class=cF0> dont_push_float,dont_pop_float;
|
||
|
|
<a name="l554"></a> </span><span class=cF1>if</span><span class=cF0> (tmpi->arg2.type&</span><span class=cF3>MDF_IMM</span><span class=cF0> && !tmpi->arg2.disp) </span><span class=cF7>{</span><span class=cF0>
|
||
|
|
<a name="l555"></a> </span><span class=cFD>CmpSetFloatOpPushPop</span><span class=cF0>(cc,tmpi,&dont_push_float,&dont_pop_float);
|
||
|
|
<a name="l556"></a> </span><span class=cF1>if</span><span class=cF0> (dont_push_float) {
|
||
|
|
<a name="l557"></a> </span><span class=cFD>ICCopyTemplate</span><span class=cF0>(cc,tmpi,</span><span class=cF3>CMP_TEMPLATE_FSTP</span><span class=cF0>,</span><span class=cF3>FALSE</span><span class=cF0>,</span><span class=cF3>TRUE</span><span class=cF0>,</span><span class=cF3>TRUE</span><span class=cF0>,CN_INST);
|
||
|
|
<a name="l558"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi,tmpi->res.type,tmpi->res.</span><span class=cF1>reg</span><span class=cF0>,tmpi->res.disp,
|
||
|
|
<a name="l559"></a> </span><span class=cF3>MDF_REG</span><span class=cF0>+</span><span class=cF3>RT_I64</span><span class=cF0>,</span><span class=cF3>REG_RAX</span><span class=cF0>,0,rip);
|
||
|
|
<a name="l560"></a> } </span><span class=cF1>else</span><span class=cF0> </span><span class=cF1>if</span><span class=cF0> (dont_pop_float) {
|
||
|
|
<a name="l561"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi,</span><span class=cF3>MDF_REG</span><span class=cF0>+</span><span class=cF3>RT_I64</span><span class=cF0>,</span><span class=cF3>REG_RAX</span><span class=cF0>,0,
|
||
|
|
<a name="l562"></a> tmpi->arg1.type,tmpi->arg1.</span><span class=cF1>reg</span><span class=cF0>,tmpi->arg1.disp,rip);
|
||
|
|
<a name="l563"></a> </span><span class=cFD>ICCopyTemplate</span><span class=cF0>(cc,tmpi,</span><span class=cF3>CMP_TEMPLATE_FLD</span><span class=cF0>,</span><span class=cF3>FALSE</span><span class=cF0>,</span><span class=cF3>TRUE</span><span class=cF0>,</span><span class=cF3>TRUE</span><span class=cF0>,CN_INST);
|
||
|
|
<a name="l564"></a> } </span><span class=cF1>else</span><span class=cF0> {
|
||
|
|
<a name="l565"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi,tmpi->res.type,tmpi->res.</span><span class=cF1>reg</span><span class=cF0>,tmpi->res.disp,
|
||
|
|
<a name="l566"></a> tmpi->arg1.type,tmpi->arg1.</span><span class=cF1>reg</span><span class=cF0>,tmpi->arg1.disp,rip);
|
||
|
|
<a name="l567"></a> </span><span class=cFD>CmpNoteFloatOp</span><span class=cF0>(cc,tmpi,</span><span class=cF3>TRUE</span><span class=cF0>,</span><span class=cF3>TRUE</span><span class=cF0>,CN_INST);
|
||
|
|
<a name="l568"></a> }
|
||
|
|
<a name="l569"></a> </span><span class=cF7>}</span><span class=cF0> </span><span class=cF1>else</span><span class=cF0>
|
||
|
|
<a name="l570"></a> </span><span class=cFD>ICFOp</span><span class=cF0>(cc,tmpi,SLASH_OP_FSUB,buf,rip);
|
||
|
|
<a name="l571"></a>}
|
||
|
|
<a name="l572"></a>
|
||
|
|
<a name="l573"></a></span><span class=cF1>U0</span><span class=cF0> </span><span class=cFD>ICFPreIncDec</span><span class=cF0>(</span><span class=cF9>CCmpCtrl</span><span class=cF0> *cc,</span><span class=cF9>CIntermediateCode</span><span class=cF0> *tmpi,</span><span class=cF9>I64</span><span class=cF0> op,</span><span class=cF9>I64</span><span class=cF0> rip)
|
||
|
|
<a name="l574"></a>{
|
||
|
|
<a name="l575"></a> </span><span class=cF1>if</span><span class=cF0> (tmpi->ic_flags & </span><span class=cF3>ICF_BY_VAL</span><span class=cF0>) </span><span class=cF7>{</span><span class=cF0>
|
||
|
|
<a name="l576"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi,</span><span class=cF3>MDF_REG</span><span class=cF0>+</span><span class=cF3>RT_I64</span><span class=cF0>,</span><span class=cF3>REG_RAX</span><span class=cF0>,0,
|
||
|
|
<a name="l577"></a> tmpi->arg1.type&</span><span class=cF3>MDG_MASK</span><span class=cF0>+</span><span class=cF3>RT_I64</span><span class=cF0>,tmpi->arg1.</span><span class=cF1>reg</span><span class=cF0>,tmpi->arg1.disp,rip);
|
||
|
|
<a name="l578"></a> </span><span class=cFD>ICCopyTemplate</span><span class=cF0>(cc,tmpi,op,</span><span class=cF3>FALSE</span><span class=cF0>,</span><span class=cF3>TRUE</span><span class=cF0>,</span><span class=cF3>TRUE</span><span class=cF0>,CN_INST);
|
||
|
|
<a name="l579"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi,tmpi->arg1.type,tmpi->arg1.</span><span class=cF1>reg</span><span class=cF0>,tmpi->arg1.disp,
|
||
|
|
<a name="l580"></a> </span><span class=cF3>MDF_REG</span><span class=cF0>+</span><span class=cF3>RT_I64</span><span class=cF0>,</span><span class=cF3>REG_RAX</span><span class=cF0>,0,rip);
|
||
|
|
<a name="l581"></a> </span><span class=cF7>}</span><span class=cF0> </span><span class=cF1>else</span><span class=cF0> </span><span class=cF7>{</span><span class=cF0>
|
||
|
|
<a name="l582"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi,</span><span class=cF3>MDF_REG</span><span class=cF0>+</span><span class=cF3>RT_I64</span><span class=cF0>,</span><span class=cF3>REG_RCX</span><span class=cF0>,0,
|
||
|
|
<a name="l583"></a> tmpi->arg1.type,tmpi->arg1.</span><span class=cF1>reg</span><span class=cF0>,tmpi->arg1.disp,rip);
|
||
|
|
<a name="l584"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi,</span><span class=cF3>MDF_REG</span><span class=cF0>+</span><span class=cF3>RT_I64</span><span class=cF0>,</span><span class=cF3>REG_RAX</span><span class=cF0>,0,</span><span class=cF3>MDF_DISP</span><span class=cF0>+</span><span class=cF3>RT_I64</span><span class=cF0>,</span><span class=cF3>REG_RCX</span><span class=cF0>,0,rip);
|
||
|
|
<a name="l585"></a> </span><span class=cFD>ICCopyTemplate</span><span class=cF0>(cc,tmpi,op,</span><span class=cF3>FALSE</span><span class=cF0>,</span><span class=cF3>TRUE</span><span class=cF0>,</span><span class=cF3>TRUE</span><span class=cF0>,CN_INST);
|
||
|
|
<a name="l586"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi,</span><span class=cF3>MDF_DISP</span><span class=cF0>+</span><span class=cF3>RT_I64</span><span class=cF0>,</span><span class=cF3>REG_RCX</span><span class=cF0>,0,</span><span class=cF3>MDF_REG</span><span class=cF0>+</span><span class=cF3>RT_I64</span><span class=cF0>,</span><span class=cF3>REG_RAX</span><span class=cF0>,0,rip);
|
||
|
|
<a name="l587"></a> </span><span class=cF7>}</span><span class=cF0>
|
||
|
|
<a name="l588"></a> </span><span class=cF1>if</span><span class=cF0> (tmpi->res.type.mode)
|
||
|
|
<a name="l589"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi,tmpi->res.type,tmpi->res.</span><span class=cF1>reg</span><span class=cF0>,tmpi->res.disp,
|
||
|
|
<a name="l590"></a> </span><span class=cF3>MDF_REG</span><span class=cF0>+</span><span class=cF3>RT_I64</span><span class=cF0>,</span><span class=cF3>REG_RAX</span><span class=cF0>,0,rip);
|
||
|
|
<a name="l591"></a>}
|
||
|
|
<a name="l592"></a>
|
||
|
|
<a name="l593"></a></span><span class=cF1>U0</span><span class=cF0> </span><span class=cFD>ICFPostIncDec</span><span class=cF0>(</span><span class=cF9>CCmpCtrl</span><span class=cF0> *cc,</span><span class=cF9>CIntermediateCode</span><span class=cF0> *tmpi,</span><span class=cF9>I64</span><span class=cF0> op,</span><span class=cF9>I64</span><span class=cF0> rip)
|
||
|
|
<a name="l594"></a>{
|
||
|
|
<a name="l595"></a> </span><span class=cF1>if</span><span class=cF0> (tmpi->ic_flags & </span><span class=cF3>ICF_BY_VAL</span><span class=cF0>) </span><span class=cF7>{</span><span class=cF0>
|
||
|
|
<a name="l596"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi,</span><span class=cF3>MDF_REG</span><span class=cF0>+</span><span class=cF3>RT_I64</span><span class=cF0>,</span><span class=cF3>REG_RAX</span><span class=cF0>,0,
|
||
|
|
<a name="l597"></a> tmpi->arg1.type&</span><span class=cF3>MDG_MASK</span><span class=cF0>+</span><span class=cF3>RT_I64</span><span class=cF0>,tmpi->arg1.</span><span class=cF1>reg</span><span class=cF0>,tmpi->arg1.disp,rip);
|
||
|
|
<a name="l598"></a> </span><span class=cF1>if</span><span class=cF0> (tmpi->res.type.mode)
|
||
|
|
<a name="l599"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi,</span><span class=cF3>MDF_REG</span><span class=cF0>+</span><span class=cF3>RT_I64</span><span class=cF0>,</span><span class=cF3>REG_RDX</span><span class=cF0>,0,</span><span class=cF3>MDF_REG</span><span class=cF0>+</span><span class=cF3>RT_I64</span><span class=cF0>,</span><span class=cF3>REG_RAX</span><span class=cF0>,0,rip);
|
||
|
|
<a name="l600"></a> </span><span class=cFD>ICCopyTemplate</span><span class=cF0>(cc,tmpi,op,</span><span class=cF3>FALSE</span><span class=cF0>,</span><span class=cF3>TRUE</span><span class=cF0>,</span><span class=cF3>TRUE</span><span class=cF0>,CN_INST);
|
||
|
|
<a name="l601"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi,tmpi->arg1.type,tmpi->arg1.</span><span class=cF1>reg</span><span class=cF0>,tmpi->arg1.disp,
|
||
|
|
<a name="l602"></a> </span><span class=cF3>MDF_REG</span><span class=cF0>+</span><span class=cF3>RT_I64</span><span class=cF0>,</span><span class=cF3>REG_RAX</span><span class=cF0>,0,rip);
|
||
|
|
<a name="l603"></a> </span><span class=cF7>}</span><span class=cF0> </span><span class=cF1>else</span><span class=cF0> </span><span class=cF7>{</span><span class=cF0>
|
||
|
|
<a name="l604"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi,</span><span class=cF3>MDF_REG</span><span class=cF0>+</span><span class=cF3>RT_I64</span><span class=cF0>,</span><span class=cF3>REG_RCX</span><span class=cF0>,0,
|
||
|
|
<a name="l605"></a> tmpi->arg1.type,tmpi->arg1.</span><span class=cF1>reg</span><span class=cF0>,tmpi->arg1.disp,rip);
|
||
|
|
<a name="l606"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi,</span><span class=cF3>MDF_REG</span><span class=cF0>+</span><span class=cF3>RT_I64</span><span class=cF0>,</span><span class=cF3>REG_RAX</span><span class=cF0>,0,</span><span class=cF3>MDF_DISP</span><span class=cF0>+</span><span class=cF3>RT_I64</span><span class=cF0>,</span><span class=cF3>REG_RCX</span><span class=cF0>,0,rip);
|
||
|
|
<a name="l607"></a> </span><span class=cF1>if</span><span class=cF0> (tmpi->res.type.mode)
|
||
|
|
<a name="l608"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi,</span><span class=cF3>MDF_REG</span><span class=cF0>+</span><span class=cF3>RT_I64</span><span class=cF0>,</span><span class=cF3>REG_RDX</span><span class=cF0>,0,</span><span class=cF3>MDF_REG</span><span class=cF0>+</span><span class=cF3>RT_I64</span><span class=cF0>,</span><span class=cF3>REG_RAX</span><span class=cF0>,0,rip);
|
||
|
|
<a name="l609"></a> </span><span class=cFD>ICCopyTemplate</span><span class=cF0>(cc,tmpi,op,</span><span class=cF3>FALSE</span><span class=cF0>,</span><span class=cF3>TRUE</span><span class=cF0>,</span><span class=cF3>TRUE</span><span class=cF0>,CN_INST);
|
||
|
|
<a name="l610"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi,</span><span class=cF3>MDF_DISP</span><span class=cF0>+</span><span class=cF3>RT_I64</span><span class=cF0>,</span><span class=cF3>REG_RCX</span><span class=cF0>,0,</span><span class=cF3>MDF_REG</span><span class=cF0>+</span><span class=cF3>RT_I64</span><span class=cF0>,</span><span class=cF3>REG_RAX</span><span class=cF0>,0,rip);
|
||
|
|
<a name="l611"></a> </span><span class=cF7>}</span><span class=cF0>
|
||
|
|
<a name="l612"></a> </span><span class=cF1>if</span><span class=cF0> (tmpi->res.type.mode)
|
||
|
|
<a name="l613"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi,tmpi->res.type,tmpi->res.</span><span class=cF1>reg</span><span class=cF0>,tmpi->res.disp,
|
||
|
|
<a name="l614"></a> </span><span class=cF3>MDF_REG</span><span class=cF0>+</span><span class=cF3>RT_I64</span><span class=cF0>,</span><span class=cF3>REG_RDX</span><span class=cF0>,0,rip);
|
||
|
|
<a name="l615"></a>}
|
||
|
|
<a name="l616"></a>
|
||
|
|
<a name="l617"></a></span><span class=cF1>U0</span><span class=cF0> </span><span class=cFD>ICFTemplateFun</span><span class=cF0>(</span><span class=cF9>CCmpCtrl</span><span class=cF0> *cc,</span><span class=cF9>CIntermediateCode</span><span class=cF0> *tmpi,</span><span class=cF9>I64</span><span class=cF0> op,</span><span class=cF9>I64</span><span class=cF0> rip)
|
||
|
|
<a name="l618"></a>{
|
||
|
|
<a name="l619"></a> </span><span class=cF1>Bool</span><span class=cF0> dont_push_float,dont_pop_float;
|
||
|
|
<a name="l620"></a>
|
||
|
|
<a name="l621"></a> </span><span class=cFD>CmpSetFloatOpPushPop</span><span class=cF0>(cc,tmpi,&dont_push_float,&dont_pop_float);
|
||
|
|
<a name="l622"></a> </span><span class=cF1>if</span><span class=cF0> (!dont_push_float)
|
||
|
|
<a name="l623"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi,</span><span class=cF3>MDF_REG</span><span class=cF0>+</span><span class=cF3>RT_I64</span><span class=cF0>,</span><span class=cF3>REG_RAX</span><span class=cF0>,0,
|
||
|
|
<a name="l624"></a> tmpi->arg1.type,tmpi->arg1.</span><span class=cF1>reg</span><span class=cF0>,tmpi->arg1.disp,rip);
|
||
|
|
<a name="l625"></a>
|
||
|
|
<a name="l626"></a> </span><span class=cFD>ICCopyTemplate</span><span class=cF0>(cc,tmpi,op,</span><span class=cF3>FALSE</span><span class=cF0>,</span><span class=cF3>TRUE</span><span class=cF0>,</span><span class=cF3>TRUE</span><span class=cF0>,CN_INST);
|
||
|
|
<a name="l627"></a> </span><span class=cF1>if</span><span class=cF0> (tmpi->res.type.mode && !</span><span class=cF7>(</span><span class=cF0>tmpi->ic_flags & </span><span class=cF3>ICF_RES_TO_F64</span><span class=cF7>)</span><span class=cF0> &&
|
||
|
|
<a name="l628"></a> !</span><span class=cF7>(</span><span class=cF0>tmpi->ic_flags & </span><span class=cF3>ICF_RES_TO_INT</span><span class=cF7>)</span><span class=cF0>)
|
||
|
|
<a name="l629"></a> </span><span class=cFD>ICMov</span><span class=cF0>(tmpi,tmpi->res.type,tmpi->res.</span><span class=cF1>reg</span><span class=cF0>,tmpi->res.disp,
|
||
|
|
<a name="l630"></a> </span><span class=cF3>MDF_REG</span><span class=cF0>+</span><span class=cF3>RT_I64</span><span class=cF0>,</span><span class=cF3>REG_RAX</span><span class=cF0>,0,rip);
|
||
|
|
<a name="l631"></a>}
|
||
|
|
</span></pre></body>
|
||
|
|
</html>
|